Age | Commit message (Collapse) | Author | |
---|---|---|---|
2020-10-27 | fix misdecode of instructions in opcode 0x800.1.3 | iximeow | |
2020-08-15 | add RegSpec constructors, consts, and const fns0.1.2 | iximeow | |
2020-08-15 | add register class constants to allow reasoning about register operands0.1.1 | iximeow | |
also bump to 0.1.1 | |||
2020-08-09 | inaugural 0.1.0 release!0.1.0 | iximeow | |
add doc comments for public items, record changelog, and lets ship this!! | |||
2020-08-09 | adjust public interface: public items should all be stable | iximeow | |
`OperandCode` (obviously) wildly varies depending on how i feel on a given week, so it's now hidden to avoid people depending on numerical values of its discriminants. `RegisterBank` got a similar treatment with a new `RegisterClass` struct that's suitable for public use. | |||
2020-08-09 | reject instructions made invalid by lock prefixes | iximeow | |
2020-08-09 | support salc, get segment register numbers right | iximeow | |
2020-08-09 | support four-reg operand forms, new tests | iximeow | |
2020-08-09 | avoid a bunch of checks in the likely display path | iximeow | |
rep_any will get speculated `false` quite quickly, whereas checking if the opcode is a string instruction will be costly no matter what. in the rare case rep_any is true, i don't care how costly displaying the instruction is - string instructions are relatively rare, and rep movs is typically not more than one instance when it shows up. | |||
2020-08-09 | display opt, aykm | iximeow | |
the arms of the match in regspec_label referenced tables that were not const. consequently, they would be rebuilt when reached, every time the match is incanted. this holds through even when regspec_label is inlined. each arm could be a const array for a small and easy change, but to avoid the indirect dispatch on spec.bank i've reorganized register names into a single const array and selected values for `RegisterBank` such that indices into that array can be formed. for my next trick, i may make `REG_NAMES` a `*const u8`, with indices picking offsets into the table - 8-byte offsets might do? this should compact down size a little more by removing a pointer and size qword for each string. | |||
2020-08-09 | significantly reorganize what operands are unlikely | iximeow | |
likely operands are now also required to have contiguous special cases 0..31. this is to avoid generating a massively sparse jump table for no reason twice - once for unlikely_operands is quite enough as-is. this will undoubtedly be a wildly annoying maintenance burden. if this pans out (initial expiriments suggest it might) then maybe a macro will do... | |||
2020-08-09 | those operands are unlikely | iximeow | |
2020-08-09 | Revert "speculative code motion" | iximeow | |
This reverts commit 21cc850afc108c147871c70240eda62ad13f34e0. | |||
2020-08-09 | speculative code motion | iximeow | |
2020-08-09 | Revert "bad idea" | iximeow | |
This reverts commit 23cbcb390c723c4c39113ce93ccff89308b6623c. | |||
2020-08-09 | bad idea | iximeow | |
2020-08-09 | try to special case immediates a bit | iximeow | |
2020-08-09 | centralize mem_oper assignment where possible | iximeow | |
2020-08-09 | special-case lea validity check better | iximeow | |
2020-08-09 | this makes it faster i guess | iximeow | |
2020-08-09 | make address_size() no longer .. necessary | iximeow | |
2020-08-09 | more speed hole! | iximeow | |
2020-08-09 | drilled a new speed hole: rex doesn't need to be held through read_M or read_sib | iximeow | |
2020-08-09 | crank up the inliner | iximeow | |
2020-08-09 | cmc and int1 | iximeow | |
2020-08-09 | invalid instruction fix | iximeow | |
2020-08-09 | lea speed hole | iximeow | |
2020-08-09 | speed holes | iximeow | |
2020-08-09 | vpminsw | iximeow | |
2020-08-09 | missing avx instr | iximeow | |
2020-08-09 | handle bad lea | iximeow | |
2020-08-09 | more pop | iximeow | |
2020-08-09 | long instructions | iximeow | |
2020-08-09 | loop{,z,nz}/jecxz | iximeow | |
2020-08-09 | movabs/offset | iximeow | |
2020-08-09 | correctly handle some more invalid opcode scenarios | iximeow | |
2020-08-09 | handle bad fe/ff opcode cases better | iximeow | |
2020-08-09 | fix setcc decoding | iximeow | |
2020-08-09 | warnings-b-gon | iximeow | |
2020-08-09 | remove unused OperandCode variants | iximeow | |
2020-08-09 | more operand code cleanup | iximeow | |
2020-08-09 | x87 support, plus several other missing instructions | iximeow | |
2020-08-09 | sse4.2 tests and missing instructions | iximeow | |
2020-08-09 | sse4.1 instruction tests | iximeow | |
2020-08-09 | display bits refactor | iximeow | |
2020-08-09 | probably not | iximeow | |
2020-08-09 | congratulations on your promotion | iximeow | |
2020-08-09 | simplify lea | iximeow | |
2020-08-09 | change it all around | iximeow | |
add `OperandCodeBuilder` to help manage allocation of enum variant values, since bit patterns of `OperandCode` are very load-bearing for decoding | |||
2020-07-26 | decode lahf/sahf | iximeow | |