| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 14 hours | add DisplayRules, docs, doc tests, .. | iximeow | |
| this includes `trait DisplayRules` as a generic mechanism to control parts of instruction printing, a `DefaultRules` for the existing formatting style, and `AbsoluteAddressFormatter` to print instructions as at some location in an address space. | |||
| 14 hours | pextr*/pinsr*/insertps/extrps immediate is now u8 instead of i8 | iximeow | |
| 14 days | the weird 64b movq thing was a capstone bug all along?! | iximeow | |
| 14 days | 64-bit: vex-prefix register extension.. | iximeow | |
| 14 days | fix several instructions' incorrect memory or op2 size | iximeow | |
| 14 days | rename rne-sae to rn-sae | iximeow | |
| 14 days | Make invalid instruction constructors actually return invalid instructions | Samuel Arnold | |
| As opposed to nops. | |||
| 2026-05-26 | fix jrcxz/jecxz/jcxz having "two operands" | iximeow | |
| 2026-05-25 | and some prefix helpers should be pub | iximeow | |
| 2026-05-25 | j*cxz/pusha/popa alternate size forms | iximeow | |
| these all existed since forever but the library did not distinguish them and did not provide prefix information for users to tell which had been decoded. | |||
| 2026-05-25 | add behavior information for x86_64 instructions | iximeow | |
| this is a squash of a few months' hacking, including but not limited to what eventually got extracted into https://git.iximeow.net/asmlinator/about/ the path here is generally not historically interesting, and the vast majority of this diff is very particular static data tables (BehaviorDigests and implicit operand lists) `src/long_mode/behavior.rs` will more or less be directly adapted into versions for x86-32 and x86-16, similar to the instruction decoders. | |||
| 2026-05-25 | disallow 66-prefixed sha1rnds4 | iximeow | |
| 2026-05-25 | working through a bunch of avx512 stuff, regspec constructors are const | iximeow | |
| 2026-05-25 | pextr*/extractps | iximeow | |
| 2026-05-25 | report memory access size for "monitor" | iximeow | |
| 2026-05-25 | maskmov{q,dqu} memory access size | iximeow | |
| 2026-05-25 | more precise about 0f0d prefetch/nop | iximeow | |
| 2026-05-25 | fix table management instructions' ({l,s}{g,i,l}dt) mem_size | iximeow | |
| these instructions, it turns out, have fixed operand size based on CPU execution mode and regardless of prefixes. good to know! | |||
| 2026-05-25 | more accurate mov seg-to-gpr operand size | iximeow | |
| 2026-05-25 | push/pop for segment registers has implicit memory access | iximeow | |
| 2026-05-25 | pushf, popf, enter, leave, xlat all have implicit memory access | iximeow | |
| also add "is_masked" to operand spec | |||
| 2026-05-25 | add initial stats for disasm stats in all modes | iximeow | |
| 2026-02-22 | correct push-immediate memory access size | iximeow | |
| 2026-02-14 | type aliases make some of these signatures less egregious.. | iximeow | |
| 2026-02-14 | uarch settings for apx, avx10.1, etc + nouns get caps | iximeow | |
| 2025-06-01 | describe the per-isa extensions a bit better | iximeow | |
| 2025-06-01 | revise_instruction is the same on all bitnesses, so macro it too | iximeow | |
| 2025-06-01 | DecodeEverything wasn't useful, no better than InstDecoder::default()?? | iximeow | |
| 2025-06-01 | expand isa feature selection to more bits | iximeow | |
| this is backed by the new IsaSettings trait. the existing InstDecoders are unchanged, except that they implement this new trait. also add new `DecodeEverything` structs with `IsaSettings` impls that are unconditionally set to permit anything the decoder can be configured to conditionally accept or reject. in the process, add new `_3dnow` flag and stop accepting 3dnow instructions in uarch-specific decoder settings that would not have 3dnow instructions. update AMD microarchitectures and cross-ref chip directory | |||
| 2024-06-24 | one more stray docs error | iximeow | |
| 2024-06-24 | rename most operand variants, make them structy rather than tupley | iximeow | |
| 2024-06-23 | remove selects_cs(), cs() now does the right thing | iximeow | |
| 2024-06-23 | fix several sources of dead code warnings in various crate configs | iximeow | |
| 2024-06-23 | remove yaxpeax-x86 safer_unchecked.rs, it is now in yaxpeax-arch | iximeow | |
| 2024-06-23 | cfg_attr wants feature, not features plural | iximeow | |
| 2024-06-23 | add additional `call` test cases | iximeow | |
| fix 32-bit 66-prefixed ff /2 call not having 16-bit operands fix momentary regression in rendering `call` instructions to string | |||
| 2024-06-23 | centralize unsafe claims and better validate | iximeow | |
| 2024-06-23 | InstructionTextBuffer is only present with alloc (new crate flag) | iximeow | |
| 2024-06-22 | extract reusable display bits into yaxpeax-arch, add a visitor fn to Operand | iximeow | |
| comes with deleting the body of impl Colorize for Operand, because we can reuse the normal operand formatting code | |||
| 2024-06-21 | things compile again, add a few more caution signs around InstructionTextBuffer | iximeow | |
| 2024-06-21 | separate out display code further, reword comments on InstructionTextSink to ↵ | iximeow | |
| be ... stern | |||
| 2024-06-20 | starting to get new DisplaySink stuff ready to extract... | iximeow | |
| 2024-06-19 | configurable inlining to help with opts | iximeow | |
| 2024-06-18 | enough infratructure to avoid bounds checks, at incredible user cost | iximeow | |
| 2024-06-13 | use a bit of Opcode to indicate rep/repne applicability | iximeow | |
| this reduces a `slice::contains` to a single bit test, and regroups prefix printing to deduplicate checks of the `rep` prefix seemingly this reduces instruction counts by about 1%, cycles by 0.3% or so. | |||
| 2024-04-02 | lets see how a visitor for operands works out here... | iximeow | |
| 2024-04-02 | swap test order for segment override applicability | iximeow | |
| it is almost always the case that self.prefixes.segment == Segment::DS, meaning testing for it first avoids checking `self.operands[op].is_memory()` later. this overall avoids a few instructions in the typical path, rather than checking `is_memory()` first (which would always be true in the places this function is called from) | |||
| 2024-04-02 | display opt: mem size labels and minor segment reporting changes | iximeow | |
| for mem size labels: add one new "BUG" entry at the start of the array so `mem_size` does not need to be adjusted before being used to look up a string from the `MEM_SIZE_STRINGS` array. it's hard to measure the direct benefit of this, but it shrinks codegen size by a bit and simplfies a bit of assembly.... for segment reporting changes: stos/scas/lods do not actually need special segment override logic. instead, set their use of `es` when decoded, if appropriate. this is potentially ambiguous; in non-64bit modes the sequence `26aa` would decode as `stos` with explicit `es` prefix. this is now identical to simply decoding `aa`, which now also reports that there is an explicit `es` prefix even though there is no prefix on tne instruction. on the other hand, the prefix-reported segment now more accurately describes the memory selector through which memory accesses will happen. seems ok? | |||
| 2023-12-16 | fix hreset being disassembled as having second operand of "Nothing" | iximeow | |
| just report it having one operand... | |||
| 2023-12-16 | fix incorrect register class names in long_mode1.2.1 | iximeow | |
| also adjust changelog for a 1.2.1 version again, no new interfaces to go with these bugfixes. | |||
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index : yaxpeax-x86 | |
| yaxpeax x86 decoder |
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