Age | Commit message (Collapse) | Author | |
---|---|---|---|
2020-07-26 | ptest, pmovzx | iximeow | |
2020-07-26 | ins/outs | iximeow | |
2020-07-26 | bitwise ops, test cases, btr | iximeow | |
2020-07-26 | BTR is ev,gv not q | iximeow | |
2020-07-26 | palignr and mpsabdw | iximeow | |
2020-07-26 | ssse3, some missing sse4.1, and pextrw operands | iximeow | |
2020-07-26 | support upper end of 0f opcode map mmx instructions | iximeow | |
2020-05-23 | fix important memory decode error in long mode | iximeow | |
add tests for modrm/sib decoding, xsave extensions | |||
2020-05-23 | add SHA, BMI1, and BMI2, complete XSAVE extension support | iximeow | |
additionally: cmpcxchg{8,16}b, rdrand, rdseed, rdpid, {rd,wr}{fs,gs}base | |||
2020-05-21 | add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensions | iximeow | |
also add builders to get decoders appropriate for specific microarchitectures from intel and amd * low-power architectures are not yet present | |||
2020-05-03 | "is there a rep prefix" is something people need to be able to ask | iximeow | |
2020-05-03 | add width() to ask width of an x86 operand | iximeow | |
this is largely wrong for memory operands, which require more invasive changes | |||
2020-05-03 | that instruction is cwd, not cbd | iximeow | |
2020-05-03 | bump yaxpeax-arch to 0.0.4, use AddressDiff, fix warnings in ffi | iximeow | |
2020-02-22 | explicitly report x87 as not (yet) supported | iximeow | |
2020-02-22 | fix {jmp,call} <reg>, as well as jmpf/callf | iximeow | |
also support vmxon to finish out the f30f opcode map add tests for forms of inc/dec, as well as TODOs, as yaxpeax-x86 doesn't provide a way to distinguish different operand sizes (yet) | |||
2020-02-22 | more sse/sse2 support | iximeow | |
largely f20f/f30f opcode map items | |||
2020-02-22 | support 660f sse2 instructions | iximeow | |
this isn't quite all of sse2, but gets close. the f20f opcode map still needs some touching up. also fix `G_E_xmm_Ib` not respecting rex.r for the rrr operand | |||
2020-02-16 | embarassingly had OperandSpec variants for modrm displacement == 0 backwards | iximeow | |
2020-02-11 | support `in` and `out` instructions | iximeow | |
2020-02-11 | add `RegSpec::name` to get `&'static str` labels for registers | iximeow | |
2020-02-11 | derive Ord and PartialOrd for RegSpec and RegisterBank | iximeow | |
this makes these usable as keys in collections such as BTreeMap. there is no specific ordering imposed by Ord (f.ex it may be the case that `eax > dx` while `eax > rax`), but some specific ordering may be imposed in the future. | |||
2020-01-15 | support "int imm8" instructions | iximeow | |
2020-01-15 | make space for non-64bit modes | iximeow | |