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path: root/src/long_mode/mod.rs
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2023-07-04more micro-opts...iximeow
set_embedded_instructions was unnecessarily appilied to many operand codes; this was never a correctness issue, but meant many operand decodings took a few more instruction than necessary to do nothing. setting all registers to `rax` is unnecessary, only the first register's defaulting to `rax` is effectual. this allows for not using a movabs to load initial rax state. adjust vex decoder inlining. this will be followed up by some cleanup for vex operand codes.
2023-07-04move some unlikely checks behind a branch that implies their possibilityiximeow
slightly fewer (perfectly predicted anyway) branches this way
2023-07-04fidget with read_E inlining AGAINiximeow
2023-07-04make operandcode 16b againiximeow
2023-07-04line up Opcode values for simple translation from opc bytesiximeow
2023-07-04avoid committing values to instructions until necessary, likely opc tweaksiximeow
2023-07-04make base opcode map translation a bit simpleriximeow
now the bits line up with enum variants directly (hopefully..)
2023-07-04store non-rex expected bank when first witnessing operand size prefixiximeow
the expectation here is that we can set a default `vqp_size` pretty cheaply (Prefixes::new is one store, on x86_64 anyway...). then, when we see an `operand_size` prefix, it's rare enough we can pay a little extra to speculate on *likely* implication, and update some state (`vqp_size` is *probably* going to be 2 because of it) accordingly. the cases where `vqp_size` would go unused and this was wasted effort are relativlely rare. on the other hand, we can't profitably give `rex` this treatment: `rex.w` would set `vqp_size` to `qword`, but rex-prefixed instructions are so often byte-size registers that updating `vqp_size` (conditionally, no less), is only break-even. so, keep a check for `rex.w` at use site, where it's only a choice between `qword` or `whatver-size-a-non-rex.w-prefixed-instruction-would-be-sized`, which has been kept up to date by speculation when detecting `operand_size`.
2023-07-04fix some dancing between bank size and RegisterBank enum valuesiximeow
in the process, fixed a decoding bug dealing with a0/a1/a2/a3 movs (respected rex.b when rex.b should have been ignored) this seems to maybe improve runtime ever so slightly, but this is really meant as a cleanup commit more than anything.
2023-07-04pick useful numeric values for RegisterBankiximeow
these coincidentally have the general-purpose banks (rB excepted) matching their size in bytes
2023-07-04OperandCode as a u16 caused gross movzwl, this seems just a bit betteriximeow
2023-07-04try slimming down read_opc_hotpath moreiximeow
2023-03-05add `Opcode::is_jcc`, `Opcode::is_setcc`, and `Opcode::is_cmovcc` helpersiximeow
this request/suggestion comes from [github](https://github.com/iximeow/yaxpeax-x86/issues/29)! thank you!
2023-02-19deprecate `pub fn cs`, which is an intensely embarrassing bug of a functioniximeow
unlike every other function to test if a particular selector is picked by prefixes, `Prefixes::cs` does not return bool, nor does it check the currently-selected prefix. instead, it modifies the decoded `Prefixes` to set the current prefix to `cs`. this has been a bug all the way since 0.0.1 was released. the function now does nothing, and is marked deprecated. in a future 2.x release, the function will be changed to return `bool` and be in-line with other segment selector-checking functions. in the mean time, a new `Prefixes::selects_cs()` does the correct thing. thank you to @meithecatte who pointed this out in https://github.com/iximeow/yaxpeax-x86/issues/28!
2022-12-03fix incorrect rex selection and field description offsetsiximeow
2022-12-0366 prefixes are common, 0f opcodes are commoniximeow
2022-12-03support a fast path through the decoder for [rex-prefixed]opcode instsiximeow
the overwhelming majority of x86 instructions are either a single-byte opcode or a single-byte opcode with a rex prefix. supporting these specially means that we don't have to length-check on every byte or go through the full decode loop while reading the most likely instructions. this is a significant improvement on typical x86 streams, but comes at a moderate penalty for crafted x86 instructions. the penalty is still not very bad, as the fast path is exited in favor of the full decode loop as soon as we see a non-rex prefix byte; this adds maybe a dozen instructions to the slow path.
2022-12-03just a bit more code motion that seemed to help things sometimesiximeow
2022-12-03reorder prefix checks, extract vex/evex prefix handlingiximeow
sharing vex/evex invalid prefix checks improves codegen a bit, but ordering prefix checks by likeliest prefix first reduces time falling through prefix handling arms. both together are a notable improvement in throughput on typical x86 code. bundled in here is some code motion to where `mem_size = 0` and `operand_count = 2` are executed; this is because, at least on zen2 and cascade lake parts, bunching all stores to the instruction together caused small stalls getting into the decoder. spreading out stores seems to mix these assignments with parts of code that was not using memory anyway, and pipelines better.
2022-12-03move opcode lookup tables into const arraysiximeow
cleanliness, but also slightly better codegen somehow?
2022-12-03replace size lookup logic with a LUTiximeow
the match compiled into some indirect branch awfulness!! no thank you
2022-09-23Fix some typos.Bruce Mitchener
2022-05-07more annotation fixes?iximeow
2022-04-24fix a few issues preventing no-std builds from ... buildingiximeow
this includes a `Makefile` that exercises the various crate configs. most annoyingly, several doc comments needed to grow `#[cfg(feature="fmt")]` blocks so docs continue to build with that feature enabled or disabled. carved out a way to run exhaustive tests; they should be written as `#[ignore]`, and then the makefile will run even ignored tests on the expectation that this will run the exhaustive (but slower) suite. exhaustive tests are not yet written. they'll probably involve spanning 4 byte sequences from 0 to 2^32-1.
2022-01-02Wrap unsafe functions to catch errors in debug5225225
Closes https://github.com/iximeow/yaxpeax-x86/issues/16
2021-12-19fix incorrect memory size for f30f1e-style nopiximeow
not only did the instruction have wrong data, but if displayed, the formatter would panic.
2021-12-19test that invalid RegSpec constructions panic as expectediximeow
in the process, fix 64-bit rex-byte limit, 32/16-bit mode mask reg limit
2021-10-10support endbr{32,64}iximeow
2021-10-10export `InstructionDisplayer` (#9)i509VCB
This makes generated docs refer to a type and show said type in the list of all structs rather than rustdoc showing gray text in return types. quote doc references
2021-08-22bump to yaxpeax-arch 0.2.7 and proper field description support1.1.0iximeow
2021-08-22add 16/32-bit opcode/operand boundary desc, consistentify memory descriptionsiximeow
2021-08-21add `AnnotatingDecoder` note to CHANGELOG and publicize descriptionsiximeow
2021-08-21maintain pre-annotation inlining propertiesiximeow
this gets yaxpeax-x86 in no-inline configurations back to building as it did before, but is quite a blunt hammer. it seems that extra calls to `sink.record` trips the inlining thresholds for `read_with_annotation`, and then its caller, and its caller, even when one of them is just a delegation to its inner call. this is particularly unfortunate because yaxpeax-x86 is now making a decision about the inlining of a rather large function at the public edge of its API, but these attributes match the inlining decisions that LLVM was making before adding `DescriptionSink`. hopefully not too bad. not sure how to handle this in the future.
2021-08-21add descriptions for other prefixes, 16-bit addressingiximeow
2021-08-21add description reporting for segment prefixes and opcodes for 32-bit and 16-bitiximeow
2021-08-21extend decoder annotation through all of 64-, 32-, and 16-bit modesiximeow
2021-08-21force read_sib inlining in 64-bit modeiximeow
even though NullSink is no-ops, it causes llvm to not inline this function, for a net perf reduction
2021-08-21extend annotation reporting to 32- and 16-bit modes, kindaiximeow
2021-08-21wipiximeow
2021-08-21fix incorrect decoding of 0x9*-series instructions with rex.biximeow
2021-08-21report memory sizes for push, pop, call, retiximeow
these instructions had memory sizes reported for the operand, if it was a memory operand, but for versions with non-memory operands the decoded `Instruction` would imply that non memory access would happen at all. now, decoded instructions in these cases will report a more useful memory size.
2021-08-14delcare pub const fn constructors for all gp registers, segment registers, ↵iximeow
and ip/flags
2021-08-12add RegSpec::rbx() helper (#6)chc4
2021-07-22fix incorrect decodes with scas and 67-prefixes1.0.4iximeow
2021-07-04update yaxpeax-arch to 0.2.0 and update DecodeError implsiximeow
2021-07-04update crate to rust 2018iximeow
2021-07-04support xacquire/xrelease prefixingiximeow
2021-07-04fix several incorrect tests and docs in 64- and 32-bit modesiximeow
2021-07-03update protected_mode to match long_mode docs, apisiximeow
2021-07-03update DecodeError implsiximeow