Age | Commit message (Collapse) | Author | |
---|---|---|---|
2021-03-21 | complete CET support, add UINTR, add missing VORP{S,D}, other cleanup | iximeow | |
2021-03-21 | rewrite 0f-based instruction handling | iximeow | |
this is... a more significant rewrite than i expected yaxpeax-x86 to ever need. it turns out that capstone is extremely permissive about duplicative 66/f2/f3 prefixes to the point that the implemented prefex handling was unsalvageable. while this replaces the *0f* opcode tables, i haven't profiled these changes. it's possible this is a net improvement for single-byte opcodes, it could be a net loss. code size may be severely impacted. there is still work to do. but this in total gets very close to iced/xed/zydis parity, far more than before. also adds several small extensions, gfni, 3dnow, enqcmd, invpcid, some of cet, and a few missing avx instructions. | |||
2020-08-09 | no more incomplete decoder for vex instructions | iximeow | |
for now | |||
2020-08-09 | support four-reg operand forms, new tests | iximeow | |
2020-08-09 | vinserti128 | iximeow | |
2020-08-09 | vextractf128 | iximeow | |
2020-08-09 | vpsrlq | iximeow | |
2020-08-09 | vpminsw | iximeow | |
2020-08-09 | vpermq (avx2) | iximeow | |
2020-08-09 | vpsrlw avx | iximeow | |
2020-08-09 | missing avx instr | iximeow | |
2020-08-09 | probably not | iximeow | |
2020-05-23 | add SHA, BMI1, and BMI2, complete XSAVE extension support | iximeow | |
additionally: cmpcxchg{8,16}b, rdrand, rdseed, rdpid, {rd,wr}{fs,gs}base | |||
2020-02-22 | support most avx operand codes | iximeow | |
avx is still incomplete, but less so avx is still practically untested | |||
2020-01-15 | make space for non-64bit modes | iximeow | |