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2021-07-01complete yaxpeax-arch 0.1.0 adaptation, shore up .mem_size()iximeow
2021-07-01update yaxpeax-x86 to yaxpeax-arch 0.1.0 interfacesiximeow
2021-06-29fix several lingering mem_size discrepanciesiximeow
2021-06-28remove old movsx/movzx-related memory size hacksiximeow
2021-06-28remove a few operand casesiximeow
vex decoding is really intended to avoid explosions in code size more than anything...
2021-06-28round out x86_32 support - avx2, avx, memory sizesiximeow
2021-06-28protected mode memory sizesiximeow
also some long-mode cleanup in corresponding areas
2021-06-27protected-mode avx512iximeow
2021-06-27remove support for nonexistent prefixesiximeow
2021-06-27PartialEq impls for data in instructiosn, and Instruction itselfiximeow
2021-06-27all tests now passing for long modeiximeow
2021-06-27report memory sizes for all long-mode instructionsiximeow
2021-06-26awkwardiximeow
i really didnt know rust could do this
2021-06-26clean up avx2-related warningsiximeow
2021-06-26add long-mode avx512 support, except for compressed displacementsiximeow
2021-06-12finish up long mode avx2iximeow
2021-06-11add extensive avx and initial avx2 tests, fix several bugs and missing ↵iximeow
instructions
2021-05-31fix typoiximeow
2021-05-16fix ShowContextual rendering error with stale data and operands, publish 0.2.20.2.2iximeow
2021-05-07remove dead OperandSpec variantsiximeow
2021-05-07update yaxpeax-arch to 0.0.5, fix interface breakagesiximeow
2021-03-21remove some forgotten println commentsiximeow
2021-03-21include memory sizes on inc/dec in C formatiximeow
2021-03-21make Opcode, Operand, and DecodeError non_exhaustiveiximeow
in the future these can and will change (new operands, new instructions) and i would prefer they not be major breaking changes. applications can ignore them and probably do undesired variants anyway. if you want to write a 1120-variant match, are you me? why would you do this
2021-03-21in real programs, having read_operands inlined hurts performance!iximeow
the in-repo benchmark got better with this inlined but it's probably better to leave it up to the compiler when finally stitching stuff together. i suspect that having read_operands inlined resulted in just too many live values, and the compiler was inspired to play hijinks that pipelined poorly. disas-bench shows a ~15% improvement from this change.
2021-03-21fuzzing shows resetting operands is not beneficialiximeow
2021-03-21fix potential successful decodes with Opcode::Invalidiximeow
vmov* are.. somehow messed up too
2021-03-21add tsxldtrkiximeow
does intel know no bounds
2021-03-21xed says setssbsy and saveprevssp are more permissiveiximeow
2021-03-21add missing vpmaxuw, remove nonsense avx moviximeow
2021-03-21complete CET support, add UINTR, add missing VORP{S,D}, other cleanupiximeow
2021-03-21add waitpkg, clean up unused values, old commentsiximeow
2021-03-21add tdxiximeow
decoder flag to come
2021-03-21rewrite 0f-based instruction handlingiximeow
this is... a more significant rewrite than i expected yaxpeax-x86 to ever need. it turns out that capstone is extremely permissive about duplicative 66/f2/f3 prefixes to the point that the implemented prefex handling was unsalvageable. while this replaces the *0f* opcode tables, i haven't profiled these changes. it's possible this is a net improvement for single-byte opcodes, it could be a net loss. code size may be severely impacted. there is still work to do. but this in total gets very close to iced/xed/zydis parity, far more than before. also adds several small extensions, gfni, 3dnow, enqcmd, invpcid, some of cet, and a few missing avx instructions.
2021-03-17support several new extensions, 3dnow, and nuance in invalid operandsiximeow
2021-03-14alternate display mode for c-style expressionsiximeow
2021-03-13split ffi crate to support distinct 16, 32, and 64-bit buildsiximeow
initial work to optionally discard any instruction printing support when using `-Z build-std` to fully remove .eh_frame, a stripped long_mode_no_fmt .so is 61kb!
2021-01-15support xchg AX/reg0.1.5iximeow
2021-01-15small perf tweaksiximeow
clearing reg_rrr and reg_mmm more efficiently is an extremely small win, but a win read_imm_signed generally should inline well and runs afoul of some heuristic. inlining gets about 8% improved throughput on the (unrealistic) in-repo benchmark it would be great to be able to avoid bounds checks somehow; it looks like they alone are another ~10% of decode time. i'm not sure how to pull that off while retaining the generic iterator parameter. might just not be possible.
2021-01-15fix several missing or invalid decodings among 0f01 opcodesiximeow
* `mwaitx`, `monitorx`, `rdpru`, and `clzero` are now supported * swapgs is no longer decoded in protected mode * rdpkru and wrpkru are no longer decoded if mod bits != 11
2020-11-19fix decoding of rex-prefixed modrm+sib operands selecting index 0b100 and ↵0.1.4iximeow
base 0b101 for memory operands with a base, index, and displacement either the wrong base would be selected (register number ignored, so only `*ax` or `r8*` would be reported), or yaxpeax-x86 would report a base register is present when it is not (`RegIndexBaseScaleDisp` when the operand is actually `RegScaleDisp`) thank you to Evan Johnson for catching and reporting this bug! also bump crate version to 0.1.4 as this will be immediately tagged and released.
2020-10-27fix misdecode of instructions in opcode 0x800.1.3iximeow
2020-08-15add RegSpec constructors, consts, and const fns0.1.2iximeow
2020-08-15add register class constants to allow reasoning about register operands0.1.1iximeow
also bump to 0.1.1
2020-08-09inaugural 0.1.0 release!0.1.0iximeow
add doc comments for public items, record changelog, and lets ship this!!
2020-08-09adjust public interface: public items should all be stableiximeow
`OperandCode` (obviously) wildly varies depending on how i feel on a given week, so it's now hidden to avoid people depending on numerical values of its discriminants. `RegisterBank` got a similar treatment with a new `RegisterClass` struct that's suitable for public use.
2020-08-09reject instructions made invalid by lock prefixesiximeow
2020-08-09support salc, get segment register numbers rightiximeow
2020-08-09unused importiximeow
2020-08-09no more incomplete decoder for vex instructionsiximeow
for now