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2020-08-09change it all aroundiximeow
2020-07-26decode lahf/sahfiximeow
2020-07-26more inline-friendliness when built without LTOiximeow
2020-07-26make read_num more amenable to inliningiximeow
2020-07-26ptest, pmovzxiximeow
2020-07-26ins/outsiximeow
2020-07-26bitwise ops, test cases, btriximeow
2020-07-26BTR is ev,gv not qiximeow
2020-07-26palignr and mpsabdwiximeow
2020-07-26ssse3, some missing sse4.1, and pextrw operandsiximeow
2020-07-26support upper end of 0f opcode map mmx instructionsiximeow
2020-07-18intel supported cmpxchg16b from the first x86_64 architectureiximeow
2020-05-23fix docs up, fix the spelling of penryn0.0.13iximeow
2020-05-23fix important memory decode error in long modeiximeow
2020-05-23add SHA, BMI1, and BMI2, complete XSAVE extension supportiximeow
2020-05-21add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensionsiximeow
2020-05-03"is there a rep prefix" is something people need to be able to askiximeow
2020-05-03add width() to ask width of an x86 operandiximeow
2020-05-03that instruction is cwd, not cbdiximeow
2020-05-03bump yaxpeax-arch to 0.0.4, use AddressDiff, fix warnings in ffiiximeow
2020-02-22explicitly report x87 as not (yet) supportediximeow
2020-02-22support most avx operand codesiximeow
2020-02-22fix {jmp,call} <reg>, as well as jmpf/callfiximeow
2020-02-22more sse/sse2 supportiximeow
2020-02-22support 660f sse2 instructionsiximeow
2020-02-16embarassingly had OperandSpec variants for modrm displacement == 0 backwardsiximeow
2020-02-11support `in` and `out` instructionsiximeow
2020-02-11add `RegSpec::name` to get `&'static str` labels for registersiximeow
2020-02-11derive Ord and PartialOrd for RegSpec and RegisterBankiximeow
2020-01-15support "int imm8" instructionsiximeow
2020-01-15make space for non-64bit modesiximeow