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along the way, fix an error: maskmov is memory read-write.
additionally, operand information about {push,pop}a{,d}.
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this is a squash of a few months' hacking, including but not limited to
what eventually got extracted into
https://git.iximeow.net/asmlinator/about/
the path here is generally not historically interesting, and the vast
majority of this diff is very particular static data tables
(BehaviorDigests and implicit operand lists)
`src/long_mode/behavior.rs` will more or less be directly adapted into
versions for x86-32 and x86-16, similar to the instruction decoders.
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these instructions, it turns out, have fixed operand size based on CPU
execution mode and regardless of prefixes. good to know!
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also add "is_masked" to operand spec
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tweaks too
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this is backed by the new IsaSettings trait. the existing InstDecoders
are unchanged, except that they implement this new trait.
also add new `DecodeEverything` structs with `IsaSettings` impls that
are unconditionally set to permit anything the decoder can be configured
to conditionally accept or reject.
in the process, add new `_3dnow` flag and stop accepting 3dnow
instructions in uarch-specific decoder settings that would not have
3dnow instructions.
update AMD microarchitectures and cross-ref chip directory
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this is also checked by a new fuzz target
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fix 32-bit 66-prefixed ff /2 call not having 16-bit operands
fix momentary regression in rendering `call` instructions to string
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comes with deleting the body of impl Colorize for Operand, because we can reuse the normal operand formatting code
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be ... stern
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