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13 daysslightly more centralized hex formattingiximeow
13 daysavoid intermediate buffer and copy of hex-formatted intsiximeow
13 dayslooks like that becomes memcpy, not idealiximeow
13 daysactually use small-string specializations when availableiximeow
13 dayswrite_fixed_size impls for string and BigEnoughStringiximeow
13 daysmem size strings are all 7b or lessiximeow
13 daysmove non-avx512 operand printing away from fmtiximeow
13 daysmove away from fmt for visit_i64 and displacements tooiximeow
13 daysless integer formatting in operandsiximeow
13 daysa few more accurate hintsiximeow
13 dayshelper to clear BigEnoughStringiximeow
13 daysfiguring out how to handle short variable-size stringsiximeow
13 daysenough infratructure to avoid bounds checks, at incredible user costiximeow
2024-06-17add token spans for some registersiximeow
2024-06-17might be an ok way to redesign colorization....iximeow
it turns out that yaxpeax-arch's notion of colorization has been broken from the start for systems that do markup without inline sequences (e.g. windows/cmd.exe before vt100 support)
2024-06-16use less of core::fmt, write by handiximeow
`name()` returning a `[u8; 2]` is nice when there is a specializing and unrolling write implementation, whereas `&str` might not consistently unroll into a simple 2-byte copy (rather than loop). it'll look a little more reasonable soon, hopefully..
2024-06-16remove branch better handled elsewhereiximeow
2024-06-16move to shared (safe) impl of RelativeBranchPrinteriximeow
2024-06-16commit unshippable wildly unsafe asm-filled printing codeiximeow
write_2 will never actually be used, but im adapting it into contextualize in a... better way
2024-06-16adapting contextualize_intel to use new operand visitor stuffiximeow
the reasoning for *why* `visit_operand` is better here lives as doc comments on `visit_operand` itself: it avoids going from scattered operand details to `enum Operand` only to deconstruct the enum again. instead, branch arms can get codegen'd directly against `struct Instruction` layout.
2024-06-13use a bit of Opcode to indicate rep/repne applicabilityiximeow
this reduces a `slice::contains` to a single bit test, and regroups prefix printing to deduplicate checks of the `rep` prefix seemingly this reduces instruction counts by about 1%, cycles by 0.3% or so.
2024-04-02display: remove some pointless checksiximeow
the match on opcode should have been dce, match on operands would only matter if there was a bug
2024-04-02less write, more write_striximeow
2024-04-02lets see how a visitor for operands works out here...iximeow
2024-04-02display: gate rep printing with a simpler checkiximeow
testing against six opcodes to see if we should print rep or repnz is a bit absurd. they are relatively rare instructions, so this is a long sequence of never-taken tests. we can avoid the whole thing in the common case by testing if there is any kind of rep prefix at all.
2024-04-02swap test order for segment override applicabilityiximeow
it is almost always the case that self.prefixes.segment == Segment::DS, meaning testing for it first avoids checking `self.operands[op].is_memory()` later. this overall avoids a few instructions in the typical path, rather than checking `is_memory()` first (which would always be true in the places this function is called from)
2024-04-02display opt: mem size labels and minor segment reporting changesiximeow
for mem size labels: add one new "BUG" entry at the start of the array so `mem_size` does not need to be adjusted before being used to look up a string from the `MEM_SIZE_STRINGS` array. it's hard to measure the direct benefit of this, but it shrinks codegen size by a bit and simplfies a bit of assembly.... for segment reporting changes: stos/scas/lods do not actually need special segment override logic. instead, set their use of `es` when decoded, if appropriate. this is potentially ambiguous; in non-64bit modes the sequence `26aa` would decode as `stos` with explicit `es` prefix. this is now identical to simply decoding `aa`, which now also reports that there is an explicit `es` prefix even though there is no prefix on tne instruction. on the other hand, the prefix-reported segment now more accurately describes the memory selector through which memory accesses will happen. seems ok?
2023-12-16fix hreset being disassembled as having second operand of "Nothing"iximeow
just report it having one operand...
2023-12-16fix incorrect register class names in long_mode1.2.1iximeow
also adjust changelog for a 1.2.1 version again, no new interfaces to go with these bugfixes.
2023-12-16fix opportunity for unhandled register synonymsiximeow
registers `al`, `cl`, `dl`, and `bl` could have two different representations - with `rex.w` and without. these two forms of `RegSpec` would not compare equal, nor has the same, so for code relying on `RegSpec` to faithfully represent a 1-1 mapping to x86 registers, these synonyms would introduce bugs in register analysis. for example, in `yaxpeax-core`, this would result in instructions writing to `rex.w al` not being visible as definitions for a future read of `!rex.w al`. fix this in `x86_64` code, add new test cases about the confusion, adjust register names to make this situation more clearly a bug, and introduce two new fuzz targets that would have helped spot this error.
2023-12-15more RegSpec constructor validation, fix bug in x86_64 1b reg specsiximeow
* the first four 1-byte registers, `al`, `cl`, `dl`, `bl`, can be constructed in two ways that produce "identical" `RegSpec` that are.. not. e.g. `RegSpec::al() != Regspec::rb(0)` even though `RegSpec::al().name() == RegSpec::rb(0).name()`. this corrects the `rb` constructor at least, but instructions like `4830c0` and `30c0` still produce incompatible versions of `al`. * also fix register numbering used explicit qword-sized RegSpec constructors, r12 and r13 used to produce r8 and r9
2023-12-15fix incorrect register numbers in r12/r13 RegSpec constructor functionsDongjia "toka" Zhang
these functions had a copypaste error where the r12 and r13 versions would create RegSpec for registers 8 and 9 instead of 12 and 13. use correct register numbers in these macros.
2023-07-24fix handling of lar/lsl source registeriximeow
2023-07-23fix inconsistently-poreted memory access size of vcvt{,t}{sd,si}iximeow
2023-07-23fix + better test cvttsd2si+cvtsd2si (misdecode under 64-bit)iximeow
2023-07-16forward changes along to 32-bit decoder...iximeow
2023-07-09trying to delete branches on bank sizeiximeow
2023-07-09more matches to be mad at and turn into lookups insteadiximeow
2023-07-09irritated at matchesiximeow
2023-07-09that doesnt need to be a transmuteiximeow
2023-07-09changing OpcodeRecord to avoid bad use of simdiximeow
2023-07-09smaller tables and err variants preserves perf, but less code/dataiximeow
2023-07-09table-izing these matches substantially helps (pending bugs...)iximeow
2023-07-09remove very done todoiximeow
2023-07-09bitpacking is_memory seems to help (surpisingly much!)iximeow
2023-07-09Revert "restructuring of hotpath code, not worse but not better"iximeow
This reverts commit 15c821a2d3fbf2fc0458090b6cc12f2ac093f075.
2023-07-09restructuring of hotpath code, not worse but not betteriximeow
2023-07-08consistently report end of prefixes/start of opcodeiximeow
2023-07-08todo for 2.xiximeow
2023-07-08seems like this makes things a bit faster...?iximeow
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