Age | Commit message (Collapse) | Author | |
---|---|---|---|
2021-07-03 | add hreset | iximeow | |
2021-07-03 | support pconfig/tme | iximeow | |
2021-06-28 | remove old movsx/movzx-related memory size hacks | iximeow | |
2021-06-28 | round out x86_32 support - avx2, avx, memory sizes | iximeow | |
2021-06-28 | protected mode memory sizes | iximeow | |
also some long-mode cleanup in corresponding areas | |||
2021-06-27 | protected-mode avx512 | iximeow | |
2021-05-07 | update yaxpeax-arch to 0.0.5, fix interface breakages | iximeow | |
2021-03-22 | and clean up some warnings | iximeow | |
2021-03-22 | port long-mode decoder updates to protected-mode | iximeow | |
2021-01-15 | fix several missing or invalid decodings among 0f01 opcodes | iximeow | |
* `mwaitx`, `monitorx`, `rdpru`, and `clzero` are now supported * swapgs is no longer decoded in protected mode * rdpkru and wrpkru are no longer decoded if mod bits != 11 | |||
2020-08-09 | support salc, get segment register numbers right | iximeow | |
2020-08-09 | add 32-bit-only instructions | iximeow | |
2020-08-09 | port updates to protected-mode decoder | iximeow | |
2020-05-23 | add SHA, BMI1, and BMI2, complete XSAVE extension support | iximeow | |
additionally: cmpcxchg{8,16}b, rdrand, rdseed, rdpid, {rd,wr}{fs,gs}base | |||
2020-05-21 | add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensions | iximeow | |
also add builders to get decoders appropriate for specific microarchitectures from intel and amd * low-power architectures are not yet present | |||
2020-05-03 | that instruction is cwd, not cbd | iximeow | |
2020-03-22 | yaxpeax-x86 decodes in 32-bit mode now | iximeow | |