yaxpeax-x86 - yaxpeax x86 decoder

Age	Commit message (Collapse)	Author
2021-07-02	intel keylocker instructions that access memory have memory access sizes	iximeow

2021-07-02	fix several strict rejection for several	iximeow

2021-07-01	reallocate OperandCode, convert disparate registers to array	iximeow
	also remove redundant assignments of operand_count and some OperandSpec, bulk-assign all registers and operands on entry to `read_instr`. this all, taken together, shaves off about 7 cycles per decode.
2021-07-01	update yaxpeax-x86 to yaxpeax-arch 0.1.0 interfaces	iximeow

2021-06-29	fix several lingering mem_size discrepancies	iximeow

2021-06-28	remove old movsx/movzx-related memory size hacks	iximeow

2021-06-28	round out x86_32 support - avx2, avx, memory sizes	iximeow

2021-06-28	protected mode memory sizes	iximeow
	also some long-mode cleanup in corresponding areas
2021-06-27	protected-mode avx512	iximeow

2021-06-26	awkward	iximeow
	i really didnt know rust could do this
2021-05-07	remove dead OperandSpec variants	iximeow

2021-03-22	and clean up some warnings	iximeow

2021-03-22	port long-mode decoder updates to protected-mode	iximeow

2021-03-21	make Opcode, Operand, and DecodeError non_exhaustive	iximeow
	in the future these can and will change (new operands, new instructions) and i would prefer they not be major breaking changes. applications can ignore them and probably do undesired variants anyway. if you want to write a 1120-variant match, are you me? why would you do this
2021-01-15	support xchg AX/reg0.1.5	iximeow

2021-01-15	fix several missing or invalid decodings among 0f01 opcodes	iximeow
	* `mwaitx`, `monitorx`, `rdpru`, and `clzero` are now supported * swapgs is no longer decoded in protected mode * rdpkru and wrpkru are no longer decoded if mod bits != 11
2020-10-27	fix misdecode of instructions in opcode 0x800.1.3	iximeow

2020-08-15	add RegSpec constructors, consts, and const fns0.1.2	iximeow

2020-08-15	add register class constants to allow reasoning about register operands0.1.1	iximeow
	also bump to 0.1.1
2020-08-09	inaugural 0.1.0 release!0.1.0	iximeow
	add doc comments for public items, record changelog, and lets ship this!!
2020-08-09	adjust public interface: public items should all be stable	iximeow
	`OperandCode` (obviously) wildly varies depending on how i feel on a given week, so it's now hidden to avoid people depending on numerical values of its discriminants. `RegisterBank` got a similar treatment with a new `RegisterClass` struct that's suitable for public use.
2020-08-09	reject instructions made invalid by lock prefixes	iximeow

2020-08-09	support salc, get segment register numbers right	iximeow

2020-08-09	add 32-bit-only instructions	iximeow

2020-08-09	port updates to protected-mode decoder	iximeow

2020-05-23	add SHA, BMI1, and BMI2, complete XSAVE extension support	iximeow
	additionally: cmpcxchg{8,16}b, rdrand, rdseed, rdpid, {rd,wr}{fs,gs}base
2020-05-21	add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensions	iximeow
	also add builders to get decoders appropriate for specific microarchitectures from intel and amd * low-power architectures are not yet present
2020-05-03	"is there a rep prefix" is something people need to be able to ask	iximeow

2020-05-03	add width() to ask width of an x86 operand	iximeow
	this is largely wrong for memory operands, which require more invasive changes
2020-05-03	that instruction is cwd, not cbd	iximeow

2020-05-03	bump yaxpeax-arch to 0.0.4, use AddressDiff, fix warnings in ffi	iximeow

2020-03-23	update docs to not be long_mode-specific	iximeow

2020-03-22	bump to 0.0.10 to fix a warning0.0.10	iximeow

2020-03-22	yaxpeax-x86 decodes in 32-bit mode now	iximeow

2020-01-15	make space for non-64bit modes	iximeow