| Age | Commit message (Expand) | Author |
|---|
| 21 hours | fix some forms of lss/lfs/lgs having incorrectly-small memory sizes | iximeow |
| 21 hours | protected/real mode lfs/lgs/lss | iximeow |
| 21 hours | pextr*/pinsr*/insertps/extrps immediate is now u8 instead of i8 | iximeow |
| 21 hours | fix seam, user-ipi, {rd,wr}{fs,gs}base instructions decoding outside 64b mode | iximeow |
| 21 hours | add MASM-style formatting support in all modes | iximeow |
| 2026-06-21 | the weird 64b movq thing was a capstone bug all along?! | iximeow |
| 2026-06-21 | fix several instructions' incorrect memory or op2 size | iximeow |
| 2026-06-21 | rename rne-sae to rn-sae | iximeow |
| 2026-06-21 | Make invalid instruction constructors actually return invalid instructions | Samuel Arnold |
| 2026-05-26 | fix jrcxz/jecxz/jcxz having "two operands" | iximeow |
| 2026-05-25 | push/pop width in 16/32-bit modes are receptive to operand width prefix | iximeow |
| 2026-05-25 | reject arpl in 16-bit decoding | iximeow |
| 2026-05-25 | and some prefix helpers should be pub | iximeow |
| 2026-05-25 | j*cxz/pusha/popa alternate size forms | iximeow |
| 2026-05-25 | adapt long-mode behavior support to protected mode and real mode | iximeow |
| 2026-05-25 | gpr register size in real/protected mode | iximeow |
| 2026-05-25 | disallow 66-prefixed sha1rnds4 | iximeow |
| 2026-05-25 | pusha/popa/push-imm memory sizes | iximeow |
| 2026-05-25 | helpers to create cr0-cr7 | iximeow |
| 2026-05-25 | working through a bunch of avx512 stuff, regspec constructors are const | iximeow |
| 2026-05-25 | pextr*/extractps | iximeow |
| 2026-05-25 | report memory access size for "monitor" | iximeow |
| 2026-05-25 | maskmov{q,dqu} memory access size | iximeow |
| 2026-05-25 | more precise about 0f0d prefetch/nop | iximeow |
| 2026-05-25 | fix table management instructions' ({l,s}{g,i,l}dt) mem_size | iximeow |
| 2026-05-25 | push/pop for segment registers has implicit memory access | iximeow |
| 2026-05-25 | pushf, popf, enter, leave, xlat all have implicit memory access | iximeow |
| 2026-05-25 | add initial stats for disasm stats in all modes | iximeow |
| 2026-02-14 | type aliases make some of these signatures less egregious.. | iximeow |
| 2025-06-01 | describe the per-isa extensions a bit better | iximeow |
| 2025-06-01 | revise_instruction is the same on all bitnesses, so macro it too | iximeow |
| 2025-06-01 | DecodeEverything wasn't useful, no better than InstDecoder::default()?? | iximeow |
| 2025-06-01 | expand isa feature selection to more bits | iximeow |
| 2024-06-24 | rename most operand variants, make them structy rather than tupley | iximeow |
| 2024-06-23 | remove selects_cs(), cs() now does the right thing | iximeow |
| 2024-06-23 | fix several sources of dead code warnings in various crate configs | iximeow |
| 2024-06-23 | remove yaxpeax-x86 safer_unchecked.rs, it is now in yaxpeax-arch | iximeow |
| 2024-06-23 | cfg_attr wants feature, not features plural | iximeow |
| 2024-06-23 | InstructionTextBuffer for all three modes, adjust fuzzer to match | iximeow |
| 2024-06-23 | adapt OperandVisitor and related to real_mode | iximeow |
| 2024-06-23 | fix AbsoluteFarAddress being tagged as a memory operand | iximeow |
| 2024-06-23 | actually use new can_lock in 32b and 16b modes | iximeow |
| 2024-06-23 | port opcode helpers and reordering to 32-bit and 16-bit decoders | iximeow |
| 2024-06-23 | add more conditional inlining for 32-bit and 16-bit decoders | iximeow |
| 2023-12-16 | fix hreset being disassembled as having second operand of "Nothing" | iximeow |
| 2023-07-24 | fix handling of lar/lsl source register | iximeow |
| 2023-07-23 | fix + better test cvttsd2si+cvtsd2si (misdecode under 64-bit) | iximeow |
| 2023-07-16 | forward changes along to 16-bit decoder... | iximeow |
| 2023-03-05 | add `Opcode::is_jcc`, `Opcode::is_setcc`, and `Opcode::is_cmovcc` helpers | iximeow |
| 2023-02-19 | deprecate `pub fn cs`, which is an intensely embarrassing bug of a function | iximeow |
