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13 hoursactually support avx/f16c in per-uarch decodingiximeow
13 hoursvmaskmovdqu, vmovq were also incorrect in some ways...iximeow
13 hoursmore general avx improvementsiximeow
13 hourscleanup pass on vex-encoded instructions is going to be excitingiximeow
13 hoursreport memory access size for "monitor"iximeow
13 hoursmaskmov{q,dqu} memory access sizeiximeow
13 hoursmore precise about 0f0d prefetch/nopiximeow
13 hoursfix table management instructions' ({l,s}{g,i,l}dt) mem_sizeiximeow
these instructions, it turns out, have fixed operand size based on CPU execution mode and regardless of prefixes. good to know!
13 hourspush/pop for segment registers has implicit memory accessiximeow
13 hourspushf, popf, enter, leave, xlat all have implicit memory accessiximeow
also add "is_masked" to operand spec
13 hoursadd initial stats for disasm stats in all modesiximeow
2026-02-14fair enough on those warningsiximeow
2026-02-14type aliases make some of these signatures less egregious..iximeow
2025-06-013dnow was still supported on K8, K10. 32-bit mode should learn about uarch ↵iximeow
tweaks too
2025-06-01describe the per-isa extensions a bit betteriximeow
2025-06-01revise_instruction is the same on all bitnesses, so macro it tooiximeow
2025-06-01DecodeEverything wasn't useful, no better than InstDecoder::default()??iximeow
2025-06-01cpu feature bits are the same across 64/32/16-bitiximeow
2025-06-01expand isa feature selection to more bitsiximeow
this is backed by the new IsaSettings trait. the existing InstDecoders are unchanged, except that they implement this new trait. also add new `DecodeEverything` structs with `IsaSettings` impls that are unconditionally set to permit anything the decoder can be configured to conditionally accept or reject. in the process, add new `_3dnow` flag and stop accepting 3dnow instructions in uarch-specific decoder settings that would not have 3dnow instructions. update AMD microarchitectures and cross-ref chip directory
2024-06-24document one more stray unsafeiximeow
2024-06-24justify the current max instruction lengthiximeow
this is also checked by a new fuzz target
2024-06-24consistently enter register/number/opcode spansiximeow
2024-06-24rename most operand variants, make them structy rather than tupleyiximeow
2024-06-23remove selects_cs(), cs() now does the right thingiximeow
2024-06-23fix several sources of dead code warnings in various crate configsiximeow
2024-06-23remove yaxpeax-x86 safer_unchecked.rs, it is now in yaxpeax-archiximeow
2024-06-23cfg_attr wants feature, not features pluraliximeow
2024-06-23last vestiges of initial perf experimentsiximeow
2024-06-23another fuzz bugiximeow
2024-06-23fuzz caught negation bugiximeow
2024-06-23InstructionTextBuffer for all three modes, adjust fuzzer to matchiximeow
2024-06-23add additional `call` test casesiximeow
fix 32-bit 66-prefixed ff /2 call not having 16-bit operands fix momentary regression in rendering `call` instructions to string
2024-06-23forward long deprecation allowances as appropriateiximeow
2024-06-23adapt protected-mode display to real modeiximeow
2024-06-23normalize imports, pull safer_unchecked from yaxpeax-archiximeow
2024-06-23adapt OperandVisitor and related to real_modeiximeow
2024-06-23fix AbsoluteFarAddress being tagged as a memory operandiximeow
2024-06-23actually use new can_lock in 32b and 16b modesiximeow
2024-06-23actually use new can_rep in 32b and 16b modesiximeow
2024-06-23port opcode helpers and reordering to 32-bit and 16-bit decodersiximeow
2024-06-23add more conditional inlining for 32-bit and 16-bit decodersiximeow
2024-04-02display opt: mem size labels and minor segment reporting changesiximeow
for mem size labels: add one new "BUG" entry at the start of the array so `mem_size` does not need to be adjusted before being used to look up a string from the `MEM_SIZE_STRINGS` array. it's hard to measure the direct benefit of this, but it shrinks codegen size by a bit and simplfies a bit of assembly.... for segment reporting changes: stos/scas/lods do not actually need special segment override logic. instead, set their use of `es` when decoded, if appropriate. this is potentially ambiguous; in non-64bit modes the sequence `26aa` would decode as `stos` with explicit `es` prefix. this is now identical to simply decoding `aa`, which now also reports that there is an explicit `es` prefix even though there is no prefix on tne instruction. on the other hand, the prefix-reported segment now more accurately describes the memory selector through which memory accesses will happen. seems ok?
2023-12-16fix hreset being disassembled as having second operand of "Nothing"iximeow
just report it having one operand...
2023-07-24fix handling of lar/lsl source registeriximeow
2023-07-23fix inconsistently-poreted memory access size of vcvt{,t}{sd,si}iximeow
2023-07-23fix + better test cvttsd2si+cvtsd2si (misdecode under 64-bit)iximeow
2023-07-16forward changes along to 16-bit decoder...iximeow
2023-03-05add `Opcode::is_jcc`, `Opcode::is_setcc`, and `Opcode::is_cmovcc` helpersiximeow
this request/suggestion comes from [github](https://github.com/iximeow/yaxpeax-x86/issues/29)! thank you!
2023-02-19deprecate `pub fn cs`, which is an intensely embarrassing bug of a functioniximeow
unlike every other function to test if a particular selector is picked by prefixes, `Prefixes::cs` does not return bool, nor does it check the currently-selected prefix. instead, it modifies the decoded `Prefixes` to set the current prefix to `cs`. this has been a bug all the way since 0.0.1 was released. the function now does nothing, and is marked deprecated. in a future 2.x release, the function will be changed to return `bool` and be in-line with other segment selector-checking functions. in the mean time, a new `Prefixes::selects_cs()` does the correct thing. thank you to @meithecatte who pointed this out in https://github.com/iximeow/yaxpeax-x86/issues/28!
2022-12-03roll up decoding loop changes for 16-bit and 32-bit decodersiximeow
this applies * f338c74656f6eef8b3080fa9f249b1cb733fd1a9 * bece19e6a69b158893abbf56a6cac25eb25d9a32 * 6353f58170d28a142e3b012c2c86f684d50dea45 * 67be1c0983244645a3c762b7aa0601f0d0ba4bb3 * 091f1d66ef853d6339a96e43d71c137ee7d3907a as one unit to both the 16-bit and 32-bit decoders.