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34 hourspush/pop width in 16/32-bit modes are receptive to operand width prefixiximeow
35 hoursreject arpl in 16-bit decodingiximeow
35 hoursand some prefix helpers should be pubiximeow
35 hoursj*cxz/pusha/popa alternate size formsiximeow
these all existed since forever but the library did not distinguish them and did not provide prefix information for users to tell which had been decoded.
47 hoursadapt long-mode behavior support to protected mode and real modeiximeow
along the way, fix an error: maskmov is memory read-write. additionally, operand information about {push,pop}a{,d}.
2 daysgpr register size in real/protected modeiximeow
2 daysdisallow 66-prefixed sha1rnds4iximeow
2 dayspusha/popa/push-imm memory sizesiximeow
2 dayshelpers to create cr0-cr7iximeow
2 daysworking through a bunch of avx512 stuff, regspec constructors are constiximeow
2 dayspextr*/extractpsiximeow
2 daysmore precision for vinsert/vextract/vblendv{ps,pd}iximeow
2 daysactually support avx/f16c in per-uarch decodingiximeow
2 daysvmaskmovdqu, vmovq were also incorrect in some ways...iximeow
2 daysmore general avx improvementsiximeow
2 dayscleanup pass on vex-encoded instructions is going to be excitingiximeow
2 daysreport memory access size for "monitor"iximeow
2 daysmaskmov{q,dqu} memory access sizeiximeow
2 daysmore precise about 0f0d prefetch/nopiximeow
2 daysfix table management instructions' ({l,s}{g,i,l}dt) mem_sizeiximeow
these instructions, it turns out, have fixed operand size based on CPU execution mode and regardless of prefixes. good to know!
2 dayspush/pop for segment registers has implicit memory accessiximeow
2 dayspushf, popf, enter, leave, xlat all have implicit memory accessiximeow
also add "is_masked" to operand spec
2 daysadd initial stats for disasm stats in all modesiximeow
2026-02-14fair enough on those warningsiximeow
2026-02-14type aliases make some of these signatures less egregious..iximeow
2025-06-013dnow was still supported on K8, K10. 32-bit mode should learn about uarch ↵iximeow
tweaks too
2025-06-01describe the per-isa extensions a bit betteriximeow
2025-06-01revise_instruction is the same on all bitnesses, so macro it tooiximeow
2025-06-01DecodeEverything wasn't useful, no better than InstDecoder::default()??iximeow
2025-06-01cpu feature bits are the same across 64/32/16-bitiximeow
2025-06-01expand isa feature selection to more bitsiximeow
this is backed by the new IsaSettings trait. the existing InstDecoders are unchanged, except that they implement this new trait. also add new `DecodeEverything` structs with `IsaSettings` impls that are unconditionally set to permit anything the decoder can be configured to conditionally accept or reject. in the process, add new `_3dnow` flag and stop accepting 3dnow instructions in uarch-specific decoder settings that would not have 3dnow instructions. update AMD microarchitectures and cross-ref chip directory
2024-06-24document one more stray unsafeiximeow
2024-06-24justify the current max instruction lengthiximeow
this is also checked by a new fuzz target
2024-06-24consistently enter register/number/opcode spansiximeow
2024-06-24rename most operand variants, make them structy rather than tupleyiximeow
2024-06-23remove selects_cs(), cs() now does the right thingiximeow
2024-06-23fix several sources of dead code warnings in various crate configsiximeow
2024-06-23remove yaxpeax-x86 safer_unchecked.rs, it is now in yaxpeax-archiximeow
2024-06-23cfg_attr wants feature, not features pluraliximeow
2024-06-23last vestiges of initial perf experimentsiximeow
2024-06-23another fuzz bugiximeow
2024-06-23fuzz caught negation bugiximeow
2024-06-23InstructionTextBuffer for all three modes, adjust fuzzer to matchiximeow
2024-06-23add additional `call` test casesiximeow
fix 32-bit 66-prefixed ff /2 call not having 16-bit operands fix momentary regression in rendering `call` instructions to string
2024-06-23forward long deprecation allowances as appropriateiximeow
2024-06-23adapt protected-mode display to real modeiximeow
2024-06-23normalize imports, pull safer_unchecked from yaxpeax-archiximeow
2024-06-23adapt OperandVisitor and related to real_modeiximeow
2024-06-23fix AbsoluteFarAddress being tagged as a memory operandiximeow
2024-06-23actually use new can_lock in 32b and 16b modesiximeow