yaxpeax-x86 - yaxpeax x86 decoder

Age	Commit message (Expand)	Author
2020-05-23	fix important memory decode error in long mode	iximeow
2020-05-23	add SHA, BMI1, and BMI2, complete XSAVE extension support	iximeow
2020-05-21	add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensions	iximeow
2020-05-03	"is there a rep prefix" is something people need to be able to ask	iximeow
2020-05-03	add width() to ask width of an x86 operand	iximeow
2020-05-03	that instruction is cwd, not cbd	iximeow
2020-05-03	bump yaxpeax-arch to 0.0.4, use AddressDiff, fix warnings in ffi	iximeow
2020-03-23	update docs to not be long_mode-specific	iximeow
2020-03-22	bump to 0.0.10 to fix a warning0.0.10	iximeow
2020-03-22	yaxpeax-x86 decodes in 32-bit mode now	iximeow
2020-02-22	explicitly report x87 as not (yet) supported	iximeow
2020-02-22	support most avx operand codes	iximeow
2020-02-22	fix {jmp,call} <reg>, as well as jmpf/callf	iximeow
2020-02-22	more sse/sse2 support	iximeow
2020-02-22	support 660f sse2 instructions	iximeow
2020-02-16	embarassingly had OperandSpec variants for modrm displacement == 0 backwards	iximeow
2020-02-11	support `in` and `out` instructions	iximeow
2020-02-11	add `RegSpec::name` to get `&'static str` labels for registers	iximeow
2020-02-11	derive Ord and PartialOrd for RegSpec and RegisterBank	iximeow
2020-01-15	support "int imm8" instructions	iximeow
2020-01-15	make space for non-64bit modes	iximeow
2020-01-15	make x86 actually no_std	iximeow
2020-01-15	add more sse2 instructions (packed shift by immediate, mostly)	iximeow
2020-01-15	add 660f6* series instructions as well as 660f70	iximeow
2020-01-15	no_std!!	iximeow
2020-01-13	explicitly fail to handle WAIT prefix	iximeow
2020-01-13	test that instruction lengths are correct	iximeow
2020-01-13	add Default impl for Instruction to track yaxpeax-arch	iximeow
2020-01-13	de-pub some internal functions	iximeow
2020-01-12	no println when decoding vex instructions please	iximeow
2020-01-12	"fix warnings"	iximeow
2020-01-12	match changes in arch to have Resulty decode, instead of Option	iximeow
2020-01-12	custom hasher for regspec	iximeow
2020-01-12	display more directly	iximeow
2020-01-12	avx feature flag and avx/aesni instructions flagged properly	iximeow
2020-01-12	fix avx bit number	iximeow
2020-01-12	support aesni	iximeow
2020-01-12	support missing sse3 instructions, add tests for sse3 instructions	iximeow
2020-01-12	add avx decoder flag, and a display impl showing active features	iximeow
2020-01-12	test fence instructions against different quirks modes	iximeow
2020-01-12	initial flagging support	iximeow
2020-01-12	add a slew of system-y instructions, as well as cpu quirks for amd/intel fenc...	iximeow
2020-01-12	vex tests work!	iximeow
2020-01-12	vex	iximeow
2020-01-12	movs on non-byte operands	iximeow
2020-01-12	that wasnt supposed to get committed	iximeow
2020-01-12	proper movs operand support	iximeow
2020-01-12	pshuf/psr/shld/shrd plus some test fixes	iximeow
2020-01-12	down to one failing test, for now	iximeow
2020-01-12	more cvt variants	iximeow