Age | Commit message (Expand) | Author |
2020-02-11 | derive Ord and PartialOrd for RegSpec and RegisterBank | iximeow |
2020-01-15 | support "int imm8" instructions | iximeow |
2020-01-15 | make space for non-64bit modes | iximeow |
2020-01-15 | make x86 actually no_std | iximeow |
2020-01-15 | add more sse2 instructions (packed shift by immediate, mostly) | iximeow |
2020-01-15 | add 660f6* series instructions as well as 660f70 | iximeow |
2020-01-15 | no_std!! | iximeow |
2020-01-13 | explicitly fail to handle WAIT prefix | iximeow |
2020-01-13 | test that instruction lengths are correct | iximeow |
2020-01-13 | add Default impl for Instruction to track yaxpeax-arch | iximeow |
2020-01-13 | de-pub some internal functions | iximeow |
2020-01-12 | no println when decoding vex instructions please | iximeow |
2020-01-12 | "fix warnings" | iximeow |
2020-01-12 | match changes in arch to have Resulty decode, instead of Option | iximeow |
2020-01-12 | custom hasher for regspec | iximeow |
2020-01-12 | display more directly | iximeow |
2020-01-12 | avx feature flag and avx/aesni instructions flagged properly | iximeow |
2020-01-12 | fix avx bit number | iximeow |
2020-01-12 | support aesni | iximeow |
2020-01-12 | support missing sse3 instructions, add tests for sse3 instructions | iximeow |
2020-01-12 | add avx decoder flag, and a display impl showing active features | iximeow |
2020-01-12 | test fence instructions against different quirks modes | iximeow |
2020-01-12 | initial flagging support | iximeow |
2020-01-12 | add a slew of system-y instructions, as well as cpu quirks for amd/intel fenc... | iximeow |
2020-01-12 | vex tests work! | iximeow |
2020-01-12 | vex | iximeow |
2020-01-12 | movs on non-byte operands | iximeow |
2020-01-12 | that wasnt supposed to get committed | iximeow |
2020-01-12 | proper movs operand support | iximeow |
2020-01-12 | pshuf/psr/shld/shrd plus some test fixes | iximeow |
2020-01-12 | down to one failing test, for now | iximeow |
2020-01-12 | more cvt variants | iximeow |
2020-01-12 | improved cvts again, movd/movq | iximeow |
2020-01-12 | add pxor and some others, support mm operands | iximeow |
2020-01-12 | support ucomiss, cvt*, some other sse instructions | iximeow |
2020-01-12 | more careful prefix handling | iximeow |
2020-01-12 | support prefetch, movlps, movhps, refine prefix permissivity | iximeow |
2020-01-12 | fix 0x98 and 0x99 opcodes, lss/lfs/lgs decodes | iximeow |
2020-01-12 | add display rules for new opcodes, continuing to fix tests | iximeow |
2020-01-12 | properly handle excessive prefixes on 0f-category instruction | iximeow |
2020-01-12 | hack to handle prefixed sequences that might appear to be escaped opcodes | iximeow |
2020-01-12 | support imul, >2 operands, and 4-bit register bank | iximeow |
2020-01-12 | clear operands when decoding instruction, fix length counts | iximeow |
2020-01-12 | update x86 to revised decoder trait | iximeow |
2020-01-12 | most non-avx (really, non-vex) instructions | iximeow |
2020-01-12 | even more squeeze | iximeow |
2020-01-12 | more squeezing!! | iximeow |
2020-01-12 | doubly love speculation | iximeow |
2020-01-12 | wtf i love speculation | iximeow |
2020-01-12 | TEMP remove length tracking | iximeow |