yaxpeax-x86 - yaxpeax x86 decoder

Age	Commit message (Collapse)	Author
2026-03-28	more behavior, the rest of two-byte instructions?	iximeow

2026-03-27	more accurate mov seg-to-gpr operand size	iximeow

2026-03-27	push/pop for segment registers has implicit memory access	iximeow

2026-03-27	div ops, mul ops, some other	iximeow

2026-03-19	more instructions, figured out mul/imul	iximeow

2026-03-09	back at it with more instruction behaviors and carveouts	iximeow

2026-03-09	separate: more implicit operand size bits	iximeow

2026-03-09	api and more inst behavior	iximeow

2026-03-09	write/read writes operand 0	iximeow

2026-03-09	exception vector fmt	iximeow

2026-03-02	this might actually work omggggg	iximeow

2026-02-25	hey that's useful	iximeow

2026-02-23	more expansive access behavior validation, start on implicit op lists	iximeow

2026-02-23	visit flags changes, tests caught a bug!	iximeow

2026-02-23	draft	iximeow

2026-02-22	correct push-immediate memory access sizeHEAD no-gods-no-	iximeow

2026-02-14	fair enough on those warnings	iximeow

2026-02-14	type aliases make some of these signatures less egregious..	iximeow

2026-02-14	uarch settings for apx, avx10.1, etc + nouns get caps	iximeow

2025-06-01	3dnow was still supported on K8, K10. 32-bit mode should learn about uarch ↵	iximeow
	tweaks too
2025-06-01	describe the per-isa extensions a bit better	iximeow

2025-06-01	revise_instruction is the same on all bitnesses, so macro it too	iximeow

2025-06-01	DecodeEverything wasn't useful, no better than InstDecoder::default()??	iximeow

2025-06-01	cpu feature bits are the same across 64/32/16-bit	iximeow

2025-06-01	expand isa feature selection to more bits	iximeow
	this is backed by the new IsaSettings trait. the existing InstDecoders are unchanged, except that they implement this new trait. also add new `DecodeEverything` structs with `IsaSettings` impls that are unconditionally set to permit anything the decoder can be configured to conditionally accept or reject. in the process, add new `_3dnow` flag and stop accepting 3dnow instructions in uarch-specific decoder settings that would not have 3dnow instructions. update AMD microarchitectures and cross-ref chip directory
2024-06-24	document one more stray unsafe	iximeow

2024-06-24	justify the current max instruction length	iximeow
	this is also checked by a new fuzz target
2024-06-24	consistently enter register/number/opcode spans	iximeow

2024-06-24	one more stray docs error	iximeow

2024-06-24	rename most operand variants, make them structy rather than tupley	iximeow

2024-06-23	remove selects_cs(), cs() now does the right thing	iximeow

2024-06-23	nightly correctly remarked that == on fat pointers is ambiguous	iximeow

2024-06-23	fix several sources of dead code warnings in various crate configs	iximeow

2024-06-23	remove yaxpeax-x86 safer_unchecked.rs, it is now in yaxpeax-arch	iximeow

2024-06-23	cfg_attr wants feature, not features plural	iximeow

2024-06-23	last vestiges of initial perf experiments	iximeow

2024-06-23	another fuzz bug	iximeow

2024-06-23	fuzz caught negation bug	iximeow

2024-06-23	InstructionTextBuffer for all three modes, adjust fuzzer to match	iximeow

2024-06-23	stale file	iximeow

2024-06-23	add additional `call` test cases	iximeow
	fix 32-bit 66-prefixed ff /2 call not having 16-bit operands fix momentary regression in rendering `call` instructions to string
2024-06-23	forward long deprecation allowances as appropriate	iximeow

2024-06-23	adapt protected-mode display to real mode	iximeow

2024-06-23	normalize imports, pull safer_unchecked from yaxpeax-arch	iximeow

2024-06-23	fix inlining attributes re. profiling flag in protected_mode	iximeow

2024-06-23	adapt OperandVisitor and related to real_mode	iximeow

2024-06-23	adapt the rest of formating changes to protected_mode	iximeow

2024-06-23	fix AbsoluteFarAddress being tagged as a memory operand	iximeow

2024-06-23	adapt OperandVisitor to protected mode too	iximeow

2024-06-23	centralize unsafe claims and better validate	iximeow