| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2021-07-01 | reallocate OperandCode, convert disparate registers to array | iximeow | |
| also remove redundant assignments of operand_count and some OperandSpec, bulk-assign all registers and operands on entry to `read_instr`. this all, taken together, shaves off about 7 cycles per decode. | |||
| 2021-03-21 | include memory sizes on inc/dec in C format | iximeow | |
| 2021-03-21 | complete CET support, add UINTR, add missing VORP{S,D}, other cleanup | iximeow | |
| 2021-03-21 | rewrite 0f-based instruction handling | iximeow | |
| this is... a more significant rewrite than i expected yaxpeax-x86 to ever need. it turns out that capstone is extremely permissive about duplicative 66/f2/f3 prefixes to the point that the implemented prefex handling was unsalvageable. while this replaces the *0f* opcode tables, i haven't profiled these changes. it's possible this is a net improvement for single-byte opcodes, it could be a net loss. code size may be severely impacted. there is still work to do. but this in total gets very close to iced/xed/zydis parity, far more than before. also adds several small extensions, gfni, 3dnow, enqcmd, invpcid, some of cet, and a few missing avx instructions. | |||
| 2021-03-14 | alternate display mode for c-style expressions | iximeow | |
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index : yaxpeax-x86 | |
| yaxpeax x86 decoder |
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