Age | Commit message (Expand) | Author |
2024-06-23 | InstructionTextBuffer is only present with alloc (new crate flag) | iximeow |
2024-06-22 | NoColorsSink has a decent name now | iximeow |
2024-06-22 | extract reusable display bits into yaxpeax-arch, add a visitor fn to Operand | iximeow |
2024-06-21 | things compile again, add a few more caution signs around InstructionTextBuffer | iximeow |
2024-06-20 | starting to get new DisplaySink stuff ready to extract... | iximeow |
2024-06-19 | better testing for alternate sinks, fix hex formatting bug.... | iximeow |
2024-06-18 | enough infratructure to avoid bounds checks, at incredible user cost | iximeow |
2024-06-16 | commit unshippable wildly unsafe asm-filled printing code | iximeow |
2024-04-02 | display opt: mem size labels and minor segment reporting changes | iximeow |
2023-12-16 | fix hreset being disassembled as having second operand of "Nothing" | iximeow |
2023-12-16 | fix incorrect register selection for `vpbroadcastm{b2q,w2d}` with `rex.b` set | iximeow |
2023-12-16 | fix incorrect register selection for `vpmov*2m` with `rex.r` set | iximeow |
2023-12-16 | fix incorrect register selection for `vpmovm2*` with `rex.b` set | iximeow |
2023-12-16 | abnormal memory sizes for keylocker instructions are not bugs | iximeow |
2023-12-16 | fix opportunity for unhandled register synonyms | iximeow |
2023-12-15 | more RegSpec constructor validation, fix bug in x86_64 1b reg specs | iximeow |
2023-07-24 | fix handling of lar/lsl source register | iximeow |
2023-07-23 | fix inconsistently-poreted memory access size of vcvt{,t}{sd,si} | iximeow |
2023-07-23 | fix + better test cvttsd2si+cvtsd2si (misdecode under 64-bit) | iximeow |
2023-07-08 | fix v(p)gather situations, get vex tests passing again | iximeow |
2023-07-05 | fix operand handling for the psl/psr family of xmm shifts/rotates | iximeow |
2023-07-04 | two more test cases | iximeow |
2023-07-04 | fix some dancing between bank size and RegisterBank enum values | iximeow |
2023-03-05 | add `Opcode::is_jcc`, `Opcode::is_setcc`, and `Opcode::is_cmovcc` helpers | iximeow |
2022-05-01 | add testing setup for field descriptions | iximeow |
2022-04-24 | fix a few issues preventing no-std builds from ... building | iximeow |
2021-12-19 | fix incorrect memory size for f30f1e-style nop | iximeow |
2021-12-19 | test that invalid RegSpec constructions panic as expected | iximeow |
2021-12-17 | do not panic on negative compressed displacements, i mean it!! | iximeow |
2021-12-16 | displacements are stored as unsigned, but are functionally signed ints | iximeow |
2021-10-10 | support endbr{32,64} | iximeow |
2021-08-21 | fix negative relative branches (again!!! +- is bad!!!) | iximeow |
2021-08-21 | fix incorrect decoding of 0x9*-series instructions with rex.b | iximeow |
2021-08-14 | relative branches should be shown as $+offset, not just plain offset | iximeow |
2021-07-22 | fix incorrect decodes with scas and 67-prefixes1.0.4 | iximeow |
2021-07-04 | support vpscatter{dd,dq,qd,qq} | iximeow |
2021-07-04 | support avx512 registers >=16 | iximeow |
2021-07-04 | handle vzeroupper/vzeroall, reject vzero* with nonzero vvvv | iximeow |
2021-07-04 | support xacquire/xrelease prefixing | iximeow |
2021-07-04 | fix several incorrect tests and docs in 64- and 32-bit modes | iximeow |
2021-07-03 | more carefully test mmx operand sizes | iximeow |
2021-07-03 | be more strict about denying invalid operands | iximeow |
2021-07-03 | support AMD `sev_snp` | iximeow |
2021-07-03 | instructions with evex-coded registers may have registers other than 0 | iximeow |
2021-07-03 | enforce reserved evex prefix bits | iximeow |
2021-07-03 | add hreset | iximeow |
2021-07-03 | support pconfig/tme | iximeow |
2021-07-01 | reallocate OperandCode, convert disparate registers to array | iximeow |
2021-06-27 | add randomized testing against incorrect data in reused instructions | iximeow |
2021-06-27 | all tests now passing for long mode | iximeow |