Age | Commit message (Expand) | Author |
2021-12-17 | do not panic on negative compressed displacements, i mean it!! | iximeow |
2021-12-16 | displacements are stored as unsigned, but are functionally signed ints | iximeow |
2021-10-10 | support endbr{32,64} | iximeow |
2021-08-21 | fix negative relative branches (again!!! +- is bad!!!) | iximeow |
2021-08-21 | fix incorrect decoding of 0x9*-series instructions with rex.b | iximeow |
2021-08-14 | relative branches should be shown as $+offset, not just plain offset | iximeow |
2021-07-22 | fix incorrect decodes with scas and 67-prefixes1.0.4 | iximeow |
2021-07-04 | support vpscatter{dd,dq,qd,qq} | iximeow |
2021-07-04 | support avx512 registers >=16 | iximeow |
2021-07-04 | handle vzeroupper/vzeroall, reject vzero* with nonzero vvvv | iximeow |
2021-07-04 | support xacquire/xrelease prefixing | iximeow |
2021-07-04 | fix several incorrect tests and docs in 64- and 32-bit modes | iximeow |
2021-07-03 | more carefully test mmx operand sizes | iximeow |
2021-07-03 | be more strict about denying invalid operands | iximeow |
2021-07-03 | support AMD `sev_snp` | iximeow |
2021-07-03 | instructions with evex-coded registers may have registers other than 0 | iximeow |
2021-07-03 | enforce reserved evex prefix bits | iximeow |
2021-07-03 | add hreset | iximeow |
2021-07-03 | support pconfig/tme | iximeow |
2021-07-01 | reallocate OperandCode, convert disparate registers to array | iximeow |
2021-06-27 | add randomized testing against incorrect data in reused instructions | iximeow |
2021-06-27 | all tests now passing for long mode | iximeow |
2021-06-27 | report memory sizes for all long-mode instructions | iximeow |
2021-06-26 | add long-mode avx512 support, except for compressed displacements | iximeow |
2021-06-12 | finish up long mode avx2 | iximeow |
2021-06-11 | add extensive avx and initial avx2 tests, fix several bugs and missing instru... | iximeow |
2021-03-21 | add tsxldtrk | iximeow |
2021-03-21 | xed says setssbsy and saveprevssp are more permissive | iximeow |
2021-03-21 | add missing vpmaxuw, remove nonsense avx mov | iximeow |
2021-03-21 | complete CET support, add UINTR, add missing VORP{S,D}, other cleanup | iximeow |
2021-03-21 | add waitpkg, clean up unused values, old comments | iximeow |
2021-03-21 | add tdx | iximeow |
2021-03-21 | rewrite 0f-based instruction handling | iximeow |
2021-03-17 | support several new extensions, 3dnow, and nuance in invalid operands | iximeow |
2021-03-14 | alternate display mode for c-style expressions | iximeow |
2021-01-15 | support xchg AX/reg0.1.5 | iximeow |
2021-01-15 | fix several missing or invalid decodings among 0f01 opcodes | iximeow |
2020-11-19 | fix decoding of rex-prefixed modrm+sib operands selecting index 0b100 and bas...0.1.4 | iximeow |
2020-10-27 | fix misdecode of instructions in opcode 0x800.1.3 | iximeow |
2020-08-09 | adjust public interface: public items should all be stable | iximeow |
2020-08-09 | reject instructions made invalid by lock prefixes | iximeow |
2020-08-09 | support salc, get segment register numbers right | iximeow |
2020-08-09 | tests for clts | iximeow |
2020-08-09 | no more incomplete decoder for vex instructions | iximeow |
2020-08-09 | support four-reg operand forms, new tests | iximeow |
2020-08-09 | cmc and int1 | iximeow |
2020-08-09 | vinserti128 | iximeow |
2020-08-09 | vextractf128 | iximeow |
2020-08-09 | vpsrlq | iximeow |
2020-08-09 | vpminsw | iximeow |