| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2021-07-03 | be more strict about denying invalid operands | iximeow | |
| 2021-07-03 | support AMD `sev_snp` | iximeow | |
| 2021-07-03 | instructions with evex-coded registers may have registers other than 0 | iximeow | |
| 2021-07-03 | enforce reserved evex prefix bits | iximeow | |
| 2021-07-03 | add hreset | iximeow | |
| 2021-07-03 | support pconfig/tme | iximeow | |
| 2021-07-01 | reallocate OperandCode, convert disparate registers to array | iximeow | |
| also remove redundant assignments of operand_count and some OperandSpec, bulk-assign all registers and operands on entry to `read_instr`. this all, taken together, shaves off about 7 cycles per decode. | |||
| 2021-06-27 | add randomized testing against incorrect data in reused instructions | iximeow | |
| 2021-06-27 | all tests now passing for long mode | iximeow | |
| 2021-06-27 | report memory sizes for all long-mode instructions | iximeow | |
| 2021-06-26 | clean up avx2-related warnings | iximeow | |
| 2021-06-26 | add long-mode avx512 support, except for compressed displacements | iximeow | |
| 2021-06-12 | finish up long mode avx2 | iximeow | |
| 2021-06-11 | add extensive avx and initial avx2 tests, fix several bugs and missing ↵ | iximeow | |
| instructions | |||
| 2021-03-21 | include memory sizes on inc/dec in C format | iximeow | |
| 2021-03-21 | add tsxldtrk | iximeow | |
| does intel know no bounds | |||
| 2021-03-21 | xed says setssbsy and saveprevssp are more permissive | iximeow | |
| 2021-03-21 | add missing vpmaxuw, remove nonsense avx mov | iximeow | |
| 2021-03-21 | complete CET support, add UINTR, add missing VORP{S,D}, other cleanup | iximeow | |
| 2021-03-21 | add waitpkg, clean up unused values, old comments | iximeow | |
| 2021-03-21 | add tdx | iximeow | |
| decoder flag to come | |||
| 2021-03-21 | rewrite 0f-based instruction handling | iximeow | |
| this is... a more significant rewrite than i expected yaxpeax-x86 to ever need. it turns out that capstone is extremely permissive about duplicative 66/f2/f3 prefixes to the point that the implemented prefex handling was unsalvageable. while this replaces the *0f* opcode tables, i haven't profiled these changes. it's possible this is a net improvement for single-byte opcodes, it could be a net loss. code size may be severely impacted. there is still work to do. but this in total gets very close to iced/xed/zydis parity, far more than before. also adds several small extensions, gfni, 3dnow, enqcmd, invpcid, some of cet, and a few missing avx instructions. | |||
| 2021-03-17 | support several new extensions, 3dnow, and nuance in invalid operands | iximeow | |
| 2021-03-14 | alternate display mode for c-style expressions | iximeow | |
| 2021-01-15 | support xchg AX/reg0.1.5 | iximeow | |
| 2021-01-15 | fix several missing or invalid decodings among 0f01 opcodes | iximeow | |
| * `mwaitx`, `monitorx`, `rdpru`, and `clzero` are now supported * swapgs is no longer decoded in protected mode * rdpkru and wrpkru are no longer decoded if mod bits != 11 | |||
| 2020-11-19 | fix decoding of rex-prefixed modrm+sib operands selecting index 0b100 and ↵0.1.4 | iximeow | |
| base 0b101 for memory operands with a base, index, and displacement either the wrong base would be selected (register number ignored, so only `*ax` or `r8*` would be reported), or yaxpeax-x86 would report a base register is present when it is not (`RegIndexBaseScaleDisp` when the operand is actually `RegScaleDisp`) thank you to Evan Johnson for catching and reporting this bug! also bump crate version to 0.1.4 as this will be immediately tagged and released. | |||
| 2020-10-27 | fix misdecode of instructions in opcode 0x800.1.3 | iximeow | |
| 2020-08-15 | add register class constants to allow reasoning about register operands0.1.1 | iximeow | |
| also bump to 0.1.1 | |||
| 2020-08-09 | adjust public interface: public items should all be stable | iximeow | |
| `OperandCode` (obviously) wildly varies depending on how i feel on a given week, so it's now hidden to avoid people depending on numerical values of its discriminants. `RegisterBank` got a similar treatment with a new `RegisterClass` struct that's suitable for public use. | |||
| 2020-08-09 | reject instructions made invalid by lock prefixes | iximeow | |
| 2020-08-09 | support salc, get segment register numbers right | iximeow | |
| 2020-08-09 | tests for clts | iximeow | |
| 2020-08-09 | no more incomplete decoder for vex instructions | iximeow | |
| for now | |||
| 2020-08-09 | support four-reg operand forms, new tests | iximeow | |
| 2020-08-09 | cmc and int1 | iximeow | |
| 2020-08-09 | vinserti128 | iximeow | |
| 2020-08-09 | vextractf128 | iximeow | |
| 2020-08-09 | vpsrlq | iximeow | |
| 2020-08-09 | vpminsw | iximeow | |
| 2020-08-09 | vpermq (avx2) | iximeow | |
| 2020-08-09 | vpsrlw avx | iximeow | |
| 2020-08-09 | handle bad lea | iximeow | |
| 2020-08-09 | more pop | iximeow | |
| 2020-08-09 | long instructions | iximeow | |
| 2020-08-09 | loop{,z,nz}/jecxz | iximeow | |
| 2020-08-09 | movabs/offset | iximeow | |
| 2020-08-09 | fix setcc decoding | iximeow | |
| 2020-08-09 | warnings-b-gon | iximeow | |
| 2020-08-09 | x87 support, plus several other missing instructions | iximeow | |
 |
index : yaxpeax-x86 | |
| yaxpeax x86 decoder |
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