aboutsummaryrefslogtreecommitdiff
path: root/test/long_mode
AgeCommit message (Collapse)Author
12 hoursshove all the masm input/output patching into the masm tools bits..iximeow
13 hoursadd DisplayRules, docs, doc tests, ..iximeow
this includes `trait DisplayRules` as a generic mechanism to control parts of instruction printing, a `DefaultRules` for the existing formatting style, and `AbsoluteAddressFormatter` to print instructions as at some location in an address space.
13 hoursucomiss/comiss vex dumpbin bugiximeow
13 hoursfix some forms of lss/lfs/lgs having incorrectly-small memory sizesiximeow
13 hourspextr*/pinsr*/insertps/extrps immediate is now u8 instead of i8iximeow
13 hoursfix vgatherdpd using incorrect simd vector width for gather indicesiximeow
13 hoursfix vpbroadcast* memory size and source register bankiximeow
13 hoursadd MASM-style formatting support in all modesiximeow
this includes a mildly nightmarish bit of test harness to compare against ml.exe/ml64.exe/dumpbin.exe, which in turn chased out a bunch of bugs. yay!
14 daysthe weird 64b movq thing was a capstone bug all along?!iximeow
14 daysfix several instructions' incorrect memory or op2 sizeiximeow
14 daysrename rne-sae to rn-saeiximeow
14 daysfix mnemonics for prefetcht*iximeow
14 daysreworking how tests work: more modular nowiximeow
this hopefully gets testcases closer to a point where one could simply write a program that dumps test bytes and expected disassembly. more immediately, this is a structure to dangle an optioanl masm-style disassembly of an instruction for testing that imminent addition too.
14 daysfeature gate kvm tests to linuxiximeow
14 daysuseless use of unsafeiximeow
2026-05-25j*cxz/pusha/popa alternate size formsiximeow
these all existed since forever but the library did not distinguish them and did not provide prefix information for users to tell which had been decoded.
2026-05-25adapt long-mode behavior support to protected mode and real modeiximeow
along the way, fix an error: maskmov is memory read-write. additionally, operand information about {push,pop}a{,d}.
2026-05-25add behavior information for x86_64 instructionsiximeow
this is a squash of a few months' hacking, including but not limited to what eventually got extracted into https://git.iximeow.net/asmlinator/about/ the path here is generally not historically interesting, and the vast majority of this diff is very particular static data tables (BehaviorDigests and implicit operand lists) `src/long_mode/behavior.rs` will more or less be directly adapted into versions for x86-32 and x86-16, similar to the instruction decoders.
2026-05-25working through a bunch of avx512 stuff, regspec constructors are constiximeow
2026-05-25pextr*/extractpsiximeow
2026-05-25invept precisioniximeow
2026-05-25more precision for vinsert/vextract/vblendv{ps,pd}iximeow
2026-05-25actually support avx/f16c in per-uarch decodingiximeow
2026-05-25vmaskmovdqu, vmovq were also incorrect in some ways...iximeow
2026-05-25more general avx improvementsiximeow
2026-05-25cleanup pass on vex-encoded instructions is going to be excitingiximeow
2026-05-25maskmov{q,dqu} memory access sizeiximeow
2026-05-25more precise about 0f0d prefetch/nopiximeow
2026-05-25fix table management instructions' ({l,s}{g,i,l}dt) mem_sizeiximeow
these instructions, it turns out, have fixed operand size based on CPU execution mode and regardless of prefixes. good to know!
2026-05-25more accurate mov seg-to-gpr operand sizeiximeow
2026-05-25push/pop for segment registers has implicit memory accessiximeow
2026-05-25pushf, popf, enter, leave, xlat all have implicit memory accessiximeow
also add "is_masked" to operand spec
2026-02-22correct push-immediate memory access sizeiximeow
2025-09-29annotation description test requires `fmt`iximeow
this was missed in typical testing because either tests run with all features, no features, or fmt. there wasn't a test entry for only std, which was broken.
2025-06-013dnow was still supported on K8, K10. 32-bit mode should learn about uarch ↵iximeow
tweaks too
2025-06-01expand isa feature selection to more bitsiximeow
this is backed by the new IsaSettings trait. the existing InstDecoders are unchanged, except that they implement this new trait. also add new `DecodeEverything` structs with `IsaSettings` impls that are unconditionally set to permit anything the decoder can be configured to conditionally accept or reject. in the process, add new `_3dnow` flag and stop accepting 3dnow instructions in uarch-specific decoder settings that would not have 3dnow instructions. update AMD microarchitectures and cross-ref chip directory
2024-06-24rename most operand variants, make them structy rather than tupleyiximeow
2024-06-23add additional `call` test casesiximeow
fix 32-bit 66-prefixed ff /2 call not having 16-bit operands fix momentary regression in rendering `call` instructions to string
2024-06-23InstructionTextBuffer is only present with alloc (new crate flag)iximeow
2024-06-22NoColorsSink has a decent name nowiximeow
2024-06-22extract reusable display bits into yaxpeax-arch, add a visitor fn to Operandiximeow
comes with deleting the body of impl Colorize for Operand, because we can reuse the normal operand formatting code
2024-06-21things compile again, add a few more caution signs around InstructionTextBufferiximeow
2024-06-20starting to get new DisplaySink stuff ready to extract...iximeow
2024-06-19better testing for alternate sinks, fix hex formatting bug....iximeow
2024-06-18enough infratructure to avoid bounds checks, at incredible user costiximeow
2024-06-16commit unshippable wildly unsafe asm-filled printing codeiximeow
write_2 will never actually be used, but im adapting it into contextualize in a... better way
2024-04-02display opt: mem size labels and minor segment reporting changesiximeow
for mem size labels: add one new "BUG" entry at the start of the array so `mem_size` does not need to be adjusted before being used to look up a string from the `MEM_SIZE_STRINGS` array. it's hard to measure the direct benefit of this, but it shrinks codegen size by a bit and simplfies a bit of assembly.... for segment reporting changes: stos/scas/lods do not actually need special segment override logic. instead, set their use of `es` when decoded, if appropriate. this is potentially ambiguous; in non-64bit modes the sequence `26aa` would decode as `stos` with explicit `es` prefix. this is now identical to simply decoding `aa`, which now also reports that there is an explicit `es` prefix even though there is no prefix on tne instruction. on the other hand, the prefix-reported segment now more accurately describes the memory selector through which memory accesses will happen. seems ok?
2023-12-16fix hreset being disassembled as having second operand of "Nothing"iximeow
just report it having one operand...
2023-12-16fix incorrect register selection for `vpbroadcastm{b2q,w2d}` with `rex.b` setiximeow
2023-12-16fix incorrect register selection for `vpmov*2m` with `rex.r` setiximeow