| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2023-12-16 | fix hreset being disassembled as having second operand of "Nothing" | iximeow | |
| just report it having one operand... | |||
| 2023-12-16 | fix incorrect register selection for `vpbroadcastm{b2q,w2d}` with `rex.b` set | iximeow | |
| 2023-12-16 | fix incorrect register selection for `vpmov*2m` with `rex.r` set | iximeow | |
| 2023-12-16 | fix incorrect register selection for `vpmovm2*` with `rex.b` set | iximeow | |
| 2023-12-16 | abnormal memory sizes for keylocker instructions are not bugs | iximeow | |
| new `does_not_decode_invalid_registers` fuzzer found other bugs! the 384-bit accesses for 128b keylocker instructions are an otherwise-unknown size and had a memory size of `BUG`. they are not bugs. give the memory size a real name. | |||
| 2023-12-15 | more RegSpec constructor validation, fix bug in x86_64 1b reg specs | iximeow | |
| * the first four 1-byte registers, `al`, `cl`, `dl`, `bl`, can be constructed in two ways that produce "identical" `RegSpec` that are.. not. e.g. `RegSpec::al() != Regspec::rb(0)` even though `RegSpec::al().name() == RegSpec::rb(0).name()`. this corrects the `rb` constructor at least, but instructions like `4830c0` and `30c0` still produce incompatible versions of `al`. * also fix register numbering used explicit qword-sized RegSpec constructors, r12 and r13 used to produce r8 and r9 | |||
| 2023-07-24 | fix handling of lar/lsl source register | iximeow | |
| 2023-07-23 | fix inconsistently-poreted memory access size of vcvt{,t}{sd,si} | iximeow | |
| 2023-07-16 | forward changes along to 32-bit decoder... | iximeow | |
| 2023-03-05 | add `Opcode::is_jcc`, `Opcode::is_setcc`, and `Opcode::is_cmovcc` helpers | iximeow | |
| this request/suggestion comes from [github](https://github.com/iximeow/yaxpeax-x86/issues/29)! thank you! | |||
| 2022-04-30 | support 0x9a callf in 16/32-bit modes | iximeow | |
| 2022-04-24 | fix a few issues preventing no-std builds from ... building | iximeow | |
| this includes a `Makefile` that exercises the various crate configs. most annoyingly, several doc comments needed to grow `#[cfg(feature="fmt")]` blocks so docs continue to build with that feature enabled or disabled. carved out a way to run exhaustive tests; they should be written as `#[ignore]`, and then the makefile will run even ignored tests on the expectation that this will run the exhaustive (but slower) suite. exhaustive tests are not yet written. they'll probably involve spanning 4 byte sequences from 0 to 2^32-1. | |||
| 2021-12-19 | fix incorrect memory size for f30f1e-style nop | iximeow | |
| not only did the instruction have wrong data, but if displayed, the formatter would panic. | |||
| 2021-12-19 | test that invalid RegSpec constructions panic as expected | iximeow | |
| in the process, fix 64-bit rex-byte limit, 32/16-bit mode mask reg limit | |||
| 2021-12-17 | do not panic on negative compressed displacements, i mean it!! | iximeow | |
| 2021-12-16 | displacements are stored as unsigned, but are functionally signed ints | iximeow | |
| so multiplying to expand EVEX compressed offsets can overflow, and that needs to be okay. | |||
| 2021-10-10 | support endbr{32,64} | iximeow | |
| 2021-08-21 | fix negative relative branches (again!!! +- is bad!!!) | iximeow | |
| 2021-08-14 | relative branches should be shown as $+offset, not just plain offset | iximeow | |
| while x86 branches of immediates are all relative to PC, other architectures may have absolute branches to immediate addresses, leaving this syntax ambiguous and potentially confusing. yaxpeax prefers to write relative offsets `$+...` as a rule, so uphold that here. | |||
| 2021-07-22 | fix incorrect decodes with scas and 67-prefixes1.0.4 | iximeow | |
| 2021-07-04 | handle vzeroupper/vzeroall, reject vzero* with nonzero vvvv | iximeow | |
| 2021-07-04 | support xacquire/xrelease prefixing | iximeow | |
| 2021-07-04 | fix several incorrect tests and docs in 64- and 32-bit modes | iximeow | |
| 2021-07-03 | update protected_mode to match long_mode docs, apis | iximeow | |
| 2021-07-03 | more carefully test mmx operand sizes | iximeow | |
| 2021-07-03 | be more strict about denying invalid operands | iximeow | |
| 2021-07-03 | support AMD `sev_snp` | iximeow | |
| 2021-07-03 | add hreset | iximeow | |
| 2021-07-01 | reallocate OperandCode, convert disparate registers to array | iximeow | |
| also remove redundant assignments of operand_count and some OperandSpec, bulk-assign all registers and operands on entry to `read_instr`. this all, taken together, shaves off about 7 cycles per decode. | |||
| 2021-06-28 | round out x86_32 support - avx2, avx, memory sizes | iximeow | |
| 2021-06-28 | protected mode memory sizes | iximeow | |
| also some long-mode cleanup in corresponding areas | |||
| 2021-06-27 | protected-mode avx512 | iximeow | |
| 2021-03-22 | port long-mode decoder updates to protected-mode | iximeow | |
| 2021-03-21 | update protected mode tests (this breaks them horribly. next commit will fix.) | iximeow | |
| 2021-01-15 | support xchg AX/reg0.1.5 | iximeow | |
| 2021-01-15 | fix several missing or invalid decodings among 0f01 opcodes | iximeow | |
| * `mwaitx`, `monitorx`, `rdpru`, and `clzero` are now supported * swapgs is no longer decoded in protected mode * rdpkru and wrpkru are no longer decoded if mod bits != 11 | |||
| 2020-11-19 | fix decoding of rex-prefixed modrm+sib operands selecting index 0b100 and ↵0.1.4 | iximeow | |
| base 0b101 for memory operands with a base, index, and displacement either the wrong base would be selected (register number ignored, so only `*ax` or `r8*` would be reported), or yaxpeax-x86 would report a base register is present when it is not (`RegIndexBaseScaleDisp` when the operand is actually `RegScaleDisp`) thank you to Evan Johnson for catching and reporting this bug! also bump crate version to 0.1.4 as this will be immediately tagged and released. | |||
| 2020-10-27 | fix misdecode of instructions in opcode 0x800.1.3 | iximeow | |
| 2020-08-09 | adjust public interface: public items should all be stable | iximeow | |
| `OperandCode` (obviously) wildly varies depending on how i feel on a given week, so it's now hidden to avoid people depending on numerical values of its discriminants. `RegisterBank` got a similar treatment with a new `RegisterClass` struct that's suitable for public use. | |||
| 2020-08-09 | reject instructions made invalid by lock prefixes | iximeow | |
| 2020-08-09 | support salc, get segment register numbers right | iximeow | |
| 2020-08-09 | tests for clts | iximeow | |
| 2020-08-09 | add 32-bit-only instructions | iximeow | |
| 2020-08-09 | port updates to protected-mode decoder | iximeow | |
| 2020-08-09 | update protected mode tests | iximeow | |
| 2020-05-23 | fix important memory decode error in long mode | iximeow | |
| add tests for modrm/sib decoding, xsave extensions | |||
| 2020-05-23 | add SHA, BMI1, and BMI2, complete XSAVE extension support | iximeow | |
| additionally: cmpcxchg{8,16}b, rdrand, rdseed, rdpid, {rd,wr}{fs,gs}base | |||
| 2020-05-21 | add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensions | iximeow | |
| also add builders to get decoders appropriate for specific microarchitectures from intel and amd * low-power architectures are not yet present | |||
| 2020-05-03 | add width() to ask width of an x86 operand | iximeow | |
| this is largely wrong for memory operands, which require more invasive changes | |||
| 2020-05-03 | that instruction is cwd, not cbd | iximeow | |
 |
index : yaxpeax-x86 | |
| yaxpeax x86 decoder |
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