| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2021-07-03 | more carefully test mmx operand sizes | iximeow | |
| 2021-07-03 | be more strict about denying invalid operands | iximeow | |
| 2021-07-03 | support AMD `sev_snp` | iximeow | |
| 2021-07-03 | add hreset | iximeow | |
| 2021-07-01 | reallocate OperandCode, convert disparate registers to array | iximeow | |
| also remove redundant assignments of operand_count and some OperandSpec, bulk-assign all registers and operands on entry to `read_instr`. this all, taken together, shaves off about 7 cycles per decode. | |||
| 2021-06-28 | round out x86_32 support - avx2, avx, memory sizes | iximeow | |
| 2021-06-28 | protected mode memory sizes | iximeow | |
| also some long-mode cleanup in corresponding areas | |||
| 2021-06-27 | protected-mode avx512 | iximeow | |
| 2021-03-22 | port long-mode decoder updates to protected-mode | iximeow | |
| 2021-03-21 | update protected mode tests (this breaks them horribly. next commit will fix.) | iximeow | |
| 2021-01-15 | support xchg AX/reg0.1.5 | iximeow | |
| 2021-01-15 | fix several missing or invalid decodings among 0f01 opcodes | iximeow | |
| * `mwaitx`, `monitorx`, `rdpru`, and `clzero` are now supported * swapgs is no longer decoded in protected mode * rdpkru and wrpkru are no longer decoded if mod bits != 11 | |||
| 2020-11-19 | fix decoding of rex-prefixed modrm+sib operands selecting index 0b100 and ↵0.1.4 | iximeow | |
| base 0b101 for memory operands with a base, index, and displacement either the wrong base would be selected (register number ignored, so only `*ax` or `r8*` would be reported), or yaxpeax-x86 would report a base register is present when it is not (`RegIndexBaseScaleDisp` when the operand is actually `RegScaleDisp`) thank you to Evan Johnson for catching and reporting this bug! also bump crate version to 0.1.4 as this will be immediately tagged and released. | |||
| 2020-10-27 | fix misdecode of instructions in opcode 0x800.1.3 | iximeow | |
| 2020-08-09 | adjust public interface: public items should all be stable | iximeow | |
| `OperandCode` (obviously) wildly varies depending on how i feel on a given week, so it's now hidden to avoid people depending on numerical values of its discriminants. `RegisterBank` got a similar treatment with a new `RegisterClass` struct that's suitable for public use. | |||
| 2020-08-09 | reject instructions made invalid by lock prefixes | iximeow | |
| 2020-08-09 | support salc, get segment register numbers right | iximeow | |
| 2020-08-09 | tests for clts | iximeow | |
| 2020-08-09 | add 32-bit-only instructions | iximeow | |
| 2020-08-09 | port updates to protected-mode decoder | iximeow | |
| 2020-08-09 | update protected mode tests | iximeow | |
| 2020-05-23 | fix important memory decode error in long mode | iximeow | |
| add tests for modrm/sib decoding, xsave extensions | |||
| 2020-05-23 | add SHA, BMI1, and BMI2, complete XSAVE extension support | iximeow | |
| additionally: cmpcxchg{8,16}b, rdrand, rdseed, rdpid, {rd,wr}{fs,gs}base | |||
| 2020-05-21 | add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensions | iximeow | |
| also add builders to get decoders appropriate for specific microarchitectures from intel and amd * low-power architectures are not yet present | |||
| 2020-05-03 | add width() to ask width of an x86 operand | iximeow | |
| this is largely wrong for memory operands, which require more invasive changes | |||
| 2020-05-03 | that instruction is cwd, not cbd | iximeow | |
| 2020-05-03 | bump yaxpeax-arch to 0.0.4, use AddressDiff, fix warnings in ffi | iximeow | |
| 2020-03-22 | yaxpeax-x86 decodes in 32-bit mode now | iximeow | |
 |
index : yaxpeax-x86 | |
| yaxpeax x86 decoder |
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