| Age | Commit message (Expand) | Author |
|---|
| 2021-06-27 | protected-mode avx512 | iximeow |
| 2021-03-22 | port long-mode decoder updates to protected-mode | iximeow |
| 2021-03-21 | update protected mode tests (this breaks them horribly. next commit will fix.) | iximeow |
| 2021-01-15 | support xchg AX/reg0.1.5 | iximeow |
| 2021-01-15 | fix several missing or invalid decodings among 0f01 opcodes | iximeow |
| 2020-11-19 | fix decoding of rex-prefixed modrm+sib operands selecting index 0b100 and bas...0.1.4 | iximeow |
| 2020-10-27 | fix misdecode of instructions in opcode 0x800.1.3 | iximeow |
| 2020-08-15 | add register class constants to allow reasoning about register operands0.1.1 | iximeow |
| 2020-08-09 | adjust public interface: public items should all be stable | iximeow |
| 2020-08-09 | reject instructions made invalid by lock prefixes | iximeow |
| 2020-08-09 | support salc, get segment register numbers right | iximeow |
| 2020-08-09 | tests for clts | iximeow |
| 2020-08-09 | add 32-bit-only instructions | iximeow |
| 2020-08-09 | port updates to protected-mode decoder | iximeow |
| 2020-08-09 | update protected mode tests | iximeow |
| 2020-05-23 | fix important memory decode error in long mode | iximeow |
| 2020-05-23 | add SHA, BMI1, and BMI2, complete XSAVE extension support | iximeow |
| 2020-05-21 | add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensions | iximeow |
| 2020-05-03 | add width() to ask width of an x86 operand | iximeow |
| 2020-05-03 | that instruction is cwd, not cbd | iximeow |
| 2020-05-03 | bump yaxpeax-arch to 0.0.4, use AddressDiff, fix warnings in ffi | iximeow |
| 2020-03-22 | yaxpeax-x86 decodes in 32-bit mode now | iximeow |
