| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 23 hours | fix some forms of lss/lfs/lgs having incorrectly-small memory sizes | iximeow | |
| 23 hours | protected/real mode lfs/lgs/lss | iximeow | |
| 23 hours | pextr*/pinsr*/insertps/extrps immediate is now u8 instead of i8 | iximeow | |
| 23 hours | fix seam, user-ipi, {rd,wr}{fs,gs}base instructions decoding outside 64b mode | iximeow | |
| 23 hours | fix vgatherdpd using incorrect simd vector width for gather indices | iximeow | |
| 23 hours | fix vpbroadcast* memory size and source register bank | iximeow | |
| 23 hours | add MASM-style formatting support in all modes | iximeow | |
| this includes a mildly nightmarish bit of test harness to compare against ml.exe/ml64.exe/dumpbin.exe, which in turn chased out a bunch of bugs. yay! | |||
| 2026-06-21 | fix several instructions' incorrect memory or op2 size | iximeow | |
| 2026-06-21 | rename rne-sae to rn-sae | iximeow | |
| 2026-06-21 | fix mnemonics for prefetcht* | iximeow | |
| 2026-06-21 | feature gate kvm tests to linux | iximeow | |
| 2026-06-21 | useless use of unsafe | iximeow | |
| 2026-05-25 | push/pop width in 16/32-bit modes are receptive to operand width prefix | iximeow | |
| 2026-05-25 | dont clobber test VM control state in tests.. | iximeow | |
| 2026-05-25 | j*cxz/pusha/popa alternate size forms | iximeow | |
| these all existed since forever but the library did not distinguish them and did not provide prefix information for users to tell which had been decoded. | |||
| 2026-05-25 | adapt long-mode behavior support to protected mode and real mode | iximeow | |
| along the way, fix an error: maskmov is memory read-write. additionally, operand information about {push,pop}a{,d}. | |||
| 2026-05-25 | 66-prefixed sha1rnds4 doesnt even real | iximeow | |
| 2026-05-25 | pusha/popa/push-imm memory sizes | iximeow | |
| 2026-05-25 | working through a bunch of avx512 stuff, regspec constructors are const | iximeow | |
| 2026-05-25 | pextr*/extractps | iximeow | |
| 2026-05-25 | invept precision | iximeow | |
| 2026-05-25 | more precision for vinsert/vextract/vblendv{ps,pd} | iximeow | |
| 2026-05-25 | actually support avx/f16c in per-uarch decoding | iximeow | |
| 2026-05-25 | vmaskmovdqu, vmovq were also incorrect in some ways... | iximeow | |
| 2026-05-25 | more general avx improvements | iximeow | |
| 2026-05-25 | cleanup pass on vex-encoded instructions is going to be exciting | iximeow | |
| 2026-05-25 | maskmov{q,dqu} memory access size | iximeow | |
| 2026-05-25 | more precise about 0f0d prefetch/nop | iximeow | |
| 2026-05-25 | fix table management instructions' ({l,s}{g,i,l}dt) mem_size | iximeow | |
| these instructions, it turns out, have fixed operand size based on CPU execution mode and regardless of prefixes. good to know! | |||
| 2026-05-25 | more accurate mov seg-to-gpr operand size | iximeow | |
| 2026-05-25 | push/pop for segment registers has implicit memory access | iximeow | |
| 2026-05-25 | pushf, popf, enter, leave, xlat all have implicit memory access | iximeow | |
| also add "is_masked" to operand spec | |||
| 2025-06-01 | 3dnow was still supported on K8, K10. 32-bit mode should learn about uarch ↵ | iximeow | |
| tweaks too | |||
| 2025-06-01 | expand isa feature selection to more bits | iximeow | |
| this is backed by the new IsaSettings trait. the existing InstDecoders are unchanged, except that they implement this new trait. also add new `DecodeEverything` structs with `IsaSettings` impls that are unconditionally set to permit anything the decoder can be configured to conditionally accept or reject. in the process, add new `_3dnow` flag and stop accepting 3dnow instructions in uarch-specific decoder settings that would not have 3dnow instructions. update AMD microarchitectures and cross-ref chip directory | |||
| 2024-06-24 | rename most operand variants, make them structy rather than tupley | iximeow | |
| 2024-06-23 | add additional `call` test cases | iximeow | |
| fix 32-bit 66-prefixed ff /2 call not having 16-bit operands fix momentary regression in rendering `call` instructions to string | |||
| 2023-12-16 | fix hreset being disassembled as having second operand of "Nothing" | iximeow | |
| just report it having one operand... | |||
| 2023-12-16 | fix incorrect register selection for `vpbroadcastm{b2q,w2d}` with `rex.b` set | iximeow | |
| 2023-12-16 | fix incorrect register selection for `vpmov*2m` with `rex.r` set | iximeow | |
| 2023-12-16 | fix incorrect register selection for `vpmovm2*` with `rex.b` set | iximeow | |
| 2023-12-16 | abnormal memory sizes for keylocker instructions are not bugs | iximeow | |
| new `does_not_decode_invalid_registers` fuzzer found other bugs! the 384-bit accesses for 128b keylocker instructions are an otherwise-unknown size and had a memory size of `BUG`. they are not bugs. give the memory size a real name. | |||
| 2023-12-15 | more RegSpec constructor validation, fix bug in x86_64 1b reg specs | iximeow | |
| * the first four 1-byte registers, `al`, `cl`, `dl`, `bl`, can be constructed in two ways that produce "identical" `RegSpec` that are.. not. e.g. `RegSpec::al() != Regspec::rb(0)` even though `RegSpec::al().name() == RegSpec::rb(0).name()`. this corrects the `rb` constructor at least, but instructions like `4830c0` and `30c0` still produce incompatible versions of `al`. * also fix register numbering used explicit qword-sized RegSpec constructors, r12 and r13 used to produce r8 and r9 | |||
| 2023-07-24 | fix handling of lar/lsl source register | iximeow | |
| 2023-07-23 | fix inconsistently-poreted memory access size of vcvt{,t}{sd,si} | iximeow | |
| 2023-07-16 | forward changes along to 32-bit decoder... | iximeow | |
| 2023-03-05 | add `Opcode::is_jcc`, `Opcode::is_setcc`, and `Opcode::is_cmovcc` helpers | iximeow | |
| this request/suggestion comes from [github](https://github.com/iximeow/yaxpeax-x86/issues/29)! thank you! | |||
| 2022-04-30 | support 0x9a callf in 16/32-bit modes | iximeow | |
| 2022-04-24 | fix a few issues preventing no-std builds from ... building | iximeow | |
| this includes a `Makefile` that exercises the various crate configs. most annoyingly, several doc comments needed to grow `#[cfg(feature="fmt")]` blocks so docs continue to build with that feature enabled or disabled. carved out a way to run exhaustive tests; they should be written as `#[ignore]`, and then the makefile will run even ignored tests on the expectation that this will run the exhaustive (but slower) suite. exhaustive tests are not yet written. they'll probably involve spanning 4 byte sequences from 0 to 2^32-1. | |||
| 2022-01-12 | fuzz DisplayStyle::C and fix corresponding issues1.1.4 | iximeow | |
| 2021-12-19 | fix incorrect memory size for f30f1e-style nop | iximeow | |
| not only did the instruction have wrong data, but if displayed, the formatter would panic. | |||
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