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2021-12-19fix incorrect memory size for f30f1e-style nopiximeow
not only did the instruction have wrong data, but if displayed, the formatter would panic.
2021-12-19test that invalid RegSpec constructions panic as expectediximeow
in the process, fix 64-bit rex-byte limit, 32/16-bit mode mask reg limit
2021-12-17do not panic on negative compressed displacements, i mean it!!iximeow
2021-12-16displacements are stored as unsigned, but are functionally signed intsiximeow
so multiplying to expand EVEX compressed offsets can overflow, and that needs to be okay.
2021-10-10support endbr{32,64}iximeow
2021-08-21fix negative relative branches (again!!! +- is bad!!!)iximeow
2021-08-21clarify inaccurate 32/16-bit `call/jmp [mem]` mem_sizeiximeow
2021-08-21report memory sizes for push, pop, call, retiximeow
these instructions had memory sizes reported for the operand, if it was a memory operand, but for versions with non-memory operands the decoded `Instruction` would imply that non memory access would happen at all. now, decoded instructions in these cases will report a more useful memory size.
2021-08-14relative branches should be shown as $+offset, not just plain offsetiximeow
while x86 branches of immediates are all relative to PC, other architectures may have absolute branches to immediate addresses, leaving this syntax ambiguous and potentially confusing. yaxpeax prefers to write relative offsets `$+...` as a rule, so uphold that here.
2021-07-22fix incorrect decodes with scas and 67-prefixes1.0.4iximeow
2021-07-04handle vzeroupper/vzeroall, reject vzero* with nonzero vvvviximeow
2021-07-04support xacquire/xrelease prefixingiximeow
2021-07-04fix several incorrect tests and docs in 64- and 32-bit modesiximeow
2021-07-03update protected_mode to match long_mode docs, apisiximeow
2021-07-03more carefully test mmx operand sizesiximeow
2021-07-03factor out MemoryAccessSizeiximeow
2021-07-03add tests for MemoryAccessSize, consistentify style on docsiximeow
2021-07-03be more strict about denying invalid operandsiximeow
2021-07-03support AMD `sev_snp`iximeow
2021-07-03clean up x86_32 and make interfaces match x86_64iximeow
2021-07-03add hresetiximeow
2021-07-01[DROP] fix up tests to match newer operand width interfacesiximeow
2021-07-01reallocate OperandCode, convert disparate registers to arrayiximeow
also remove redundant assignments of operand_count and some OperandSpec, bulk-assign all registers and operands on entry to `read_instr`. this all, taken together, shaves off about 7 cycles per decode.
2021-06-28round out x86_32 support - avx2, avx, memory sizesiximeow
2021-06-28protected mode memory sizesiximeow
also some long-mode cleanup in corresponding areas
2021-06-27protected-mode avx512iximeow
2021-03-22port long-mode decoder updates to protected-modeiximeow
2021-03-21update protected mode tests (this breaks them horribly. next commit will fix.)iximeow
2021-01-15support xchg AX/reg0.1.5iximeow
2021-01-15fix several missing or invalid decodings among 0f01 opcodesiximeow
* `mwaitx`, `monitorx`, `rdpru`, and `clzero` are now supported * swapgs is no longer decoded in protected mode * rdpkru and wrpkru are no longer decoded if mod bits != 11
2020-11-19fix decoding of rex-prefixed modrm+sib operands selecting index 0b100 and ↵0.1.4iximeow
base 0b101 for memory operands with a base, index, and displacement either the wrong base would be selected (register number ignored, so only `*ax` or `r8*` would be reported), or yaxpeax-x86 would report a base register is present when it is not (`RegIndexBaseScaleDisp` when the operand is actually `RegScaleDisp`) thank you to Evan Johnson for catching and reporting this bug! also bump crate version to 0.1.4 as this will be immediately tagged and released.
2020-10-27fix misdecode of instructions in opcode 0x800.1.3iximeow
2020-08-15add register class constants to allow reasoning about register operands0.1.1iximeow
also bump to 0.1.1
2020-08-09adjust public interface: public items should all be stableiximeow
`OperandCode` (obviously) wildly varies depending on how i feel on a given week, so it's now hidden to avoid people depending on numerical values of its discriminants. `RegisterBank` got a similar treatment with a new `RegisterClass` struct that's suitable for public use.
2020-08-09reject instructions made invalid by lock prefixesiximeow
2020-08-09support salc, get segment register numbers rightiximeow
2020-08-09tests for cltsiximeow
2020-08-09add 32-bit-only instructionsiximeow
2020-08-09port updates to protected-mode decoderiximeow
2020-08-09update protected mode testsiximeow
2020-05-23fix important memory decode error in long modeiximeow
add tests for modrm/sib decoding, xsave extensions
2020-05-23add SHA, BMI1, and BMI2, complete XSAVE extension supportiximeow
additionally: cmpcxchg{8,16}b, rdrand, rdseed, rdpid, {rd,wr}{fs,gs}base
2020-05-21add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensionsiximeow
also add builders to get decoders appropriate for specific microarchitectures from intel and amd * low-power architectures are not yet present
2020-05-03add width() to ask width of an x86 operandiximeow
this is largely wrong for memory operands, which require more invasive changes
2020-05-03that instruction is cwd, not cbdiximeow
2020-05-03bump yaxpeax-arch to 0.0.4, use AddressDiff, fix warnings in ffiiximeow
2020-03-22yaxpeax-x86 decodes in 32-bit mode nowiximeow