Age | Commit message (Collapse) | Author | |
---|---|---|---|
2020-01-12 | update lar tests | iximeow | |
2020-01-12 | display impl doesnt show memory operand sizes | iximeow | |
2020-01-12 | decode shift-by-cl and fix error decoding sign-extending operands | iximeow | |
2020-01-12 | mov test cases | iximeow | |
2020-01-12 | extend prefixed opcode support, add tests for alternate opcode maps | iximeow | |
2020-01-12 | add more x86 instructions (bt, btr, bts, bsf, ...) and xadd | iximeow | |
2020-01-12 | add failing decode test cases | iximeow | |
2020-01-12 | begin supporting f30f instructions | iximeow | |
fix issue where non-relevant prefixes on 0f opcodes may cause incorrect invalid decodes | |||
2020-01-12 | initial support for xmm instructions | iximeow | |
2020-01-12 | fix some warnings and rdtsc/swapgs decode errors | iximeow | |
2020-01-12 | segment rendering fixes | iximeow | |
2020-01-12 | starting to get into some system instructions now | iximeow | |
2020-01-12 | fix incorrect sign tests and decode oddities | iximeow | |
2020-01-12 | several tweaks: | iximeow | |
* DisplacementI32 was never used, DisplacementU64 added to distinguish 8 and 4 byte addresses * Added setCC instructions * Fix sign extension bug for displacement as interpreted by E operands * Add operand code support for a0,a1,a2,a3 movs * Add operand code support for Ivs, Ibs * Complete support for 0x81 * Clean up tests | |||
2020-01-12 | adjust namespace layout | iximeow | |
2020-01-12 | add a vex test | iximeow | |
2020-01-12 | another testcase | iximeow | |
2020-01-12 | some more refactoring of RegSpec, support r-b registers, additional test cases | iximeow | |
2020-01-12 | add more test cases, fix movzx support, add 0xf6 opcodes | iximeow | |
2020-01-12 | initial | iximeow | |