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AgeCommit message (Expand)Author
2020-02-11support `in` and `out` instructionsiximeow
2020-02-11add `RegSpec::name` to get `&'static str` labels for registersiximeow
2020-01-15support "int imm8" instructionsiximeow
2020-01-15make space for non-64bit modesiximeow
2020-01-15add more sse2 instructions (packed shift by immediate, mostly)iximeow
2020-01-15add 660f6* series instructions as well as 660f70iximeow
2020-01-15negative displacements were printed wrong, test against that for the futureiximeow
2020-01-13explicitly fail to handle WAIT prefixiximeow
2020-01-13test that instruction lengths are correctiximeow
2020-01-13add Default impl for Instruction to track yaxpeax-archiximeow
2020-01-12"fix warnings"iximeow
2020-01-12match changes in arch to have Resulty decode, instead of Optioniximeow
2020-01-12avx feature flag and avx/aesni instructions flagged properlyiximeow
2020-01-12support aesniiximeow
2020-01-12support missing sse3 instructions, add tests for sse3 instructionsiximeow
2020-01-12test fence instructions against different quirks modesiximeow
2020-01-12add a slew of system-y instructions, as well as cpu quirks for amd/intel fenc...iximeow
2020-01-12vex tests work!iximeow
2020-01-12vexiximeow
2020-01-12proper movs operand supportiximeow
2020-01-12pshuf/psr/shld/shrd plus some test fixesiximeow
2020-01-12down to one failing test, for nowiximeow
2020-01-12more cvt variantsiximeow
2020-01-12improved cvts again, movd/movqiximeow
2020-01-12add pxor and some others, support mm operandsiximeow
2020-01-12support ucomiss, cvt*, some other sse instructionsiximeow
2020-01-12more careful prefix handlingiximeow
2020-01-12support prefetch, movlps, movhps, refine prefix permissivityiximeow
2020-01-12fix 0x98 and 0x99 opcodes, lss/lfs/lgs decodesiximeow
2020-01-12add display rules for new opcodes, continuing to fix testsiximeow
2020-01-12properly handle excessive prefixes on 0f-category instructioniximeow
2020-01-12hack to handle prefixed sequences that might appear to be escaped opcodesiximeow
2020-01-12support imul, >2 operands, and 4-bit register bankiximeow
2020-01-12most non-avx (really, non-vex) instructionsiximeow
2020-01-12update lar testsiximeow
2020-01-12display impl doesnt show memory operand sizesiximeow
2020-01-12decode shift-by-cl and fix error decoding sign-extending operandsiximeow
2020-01-12mov test casesiximeow
2020-01-12extend prefixed opcode support, add tests for alternate opcode mapsiximeow
2020-01-12add more x86 instructions (bt, btr, bts, bsf, ...) and xaddiximeow
2020-01-12add failing decode test casesiximeow
2020-01-12begin supporting f30f instructionsiximeow
2020-01-12initial support for xmm instructionsiximeow
2020-01-12fix some warnings and rdtsc/swapgs decode errorsiximeow
2020-01-12segment rendering fixesiximeow
2020-01-12starting to get into some system instructions nowiximeow
2020-01-12fix incorrect sign tests and decode odditiesiximeow
2020-01-12several tweaks:iximeow
2020-01-12adjust namespace layoutiximeow
2020-01-12add a vex testiximeow
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