| Age | Commit message (Expand) | Author |
|---|
| 2020-01-12 | support imul, >2 operands, and 4-bit register bank | iximeow |
| 2020-01-12 | most non-avx (really, non-vex) instructions | iximeow |
| 2020-01-12 | update lar tests | iximeow |
| 2020-01-12 | display impl doesnt show memory operand sizes | iximeow |
| 2020-01-12 | decode shift-by-cl and fix error decoding sign-extending operands | iximeow |
| 2020-01-12 | mov test cases | iximeow |
| 2020-01-12 | extend prefixed opcode support, add tests for alternate opcode maps | iximeow |
| 2020-01-12 | add more x86 instructions (bt, btr, bts, bsf, ...) and xadd | iximeow |
| 2020-01-12 | add failing decode test cases | iximeow |
| 2020-01-12 | begin supporting f30f instructions | iximeow |
| 2020-01-12 | initial support for xmm instructions | iximeow |
| 2020-01-12 | fix some warnings and rdtsc/swapgs decode errors | iximeow |
| 2020-01-12 | segment rendering fixes | iximeow |
| 2020-01-12 | starting to get into some system instructions now | iximeow |
| 2020-01-12 | fix incorrect sign tests and decode oddities | iximeow |
| 2020-01-12 | several tweaks: | iximeow |
| 2020-01-12 | adjust namespace layout | iximeow |
| 2020-01-12 | add a vex test | iximeow |
| 2020-01-12 | another testcase | iximeow |
| 2020-01-12 | some more refactoring of RegSpec, support r-b registers, additional test cases | iximeow |
| 2020-01-12 | add more test cases, fix movzx support, add 0xf6 opcodes | iximeow |
| 2020-01-12 | initial | iximeow |
