Age | Commit message (Collapse) | Author | |
---|---|---|---|
2021-03-14 | alternate display mode for c-style expressions | iximeow | |
2021-01-15 | support xchg AX/reg0.1.5 | iximeow | |
2021-01-15 | fix several missing or invalid decodings among 0f01 opcodes | iximeow | |
* `mwaitx`, `monitorx`, `rdpru`, and `clzero` are now supported * swapgs is no longer decoded in protected mode * rdpkru and wrpkru are no longer decoded if mod bits != 11 | |||
2020-11-19 | fix decoding of rex-prefixed modrm+sib operands selecting index 0b100 and ↵0.1.4 | iximeow | |
base 0b101 for memory operands with a base, index, and displacement either the wrong base would be selected (register number ignored, so only `*ax` or `r8*` would be reported), or yaxpeax-x86 would report a base register is present when it is not (`RegIndexBaseScaleDisp` when the operand is actually `RegScaleDisp`) thank you to Evan Johnson for catching and reporting this bug! also bump crate version to 0.1.4 as this will be immediately tagged and released. | |||
2020-10-27 | fix misdecode of instructions in opcode 0x800.1.3 | iximeow | |
2020-08-15 | add register class constants to allow reasoning about register operands0.1.1 | iximeow | |
also bump to 0.1.1 | |||
2020-08-09 | adjust public interface: public items should all be stable | iximeow | |
`OperandCode` (obviously) wildly varies depending on how i feel on a given week, so it's now hidden to avoid people depending on numerical values of its discriminants. `RegisterBank` got a similar treatment with a new `RegisterClass` struct that's suitable for public use. | |||
2020-08-09 | reject instructions made invalid by lock prefixes | iximeow | |
2020-08-09 | support salc, get segment register numbers right | iximeow | |
2020-08-09 | tests for clts | iximeow | |
2020-08-09 | add 32-bit-only instructions | iximeow | |
2020-08-09 | port updates to protected-mode decoder | iximeow | |
2020-08-09 | update protected mode tests | iximeow | |
2020-08-09 | no more incomplete decoder for vex instructions | iximeow | |
for now | |||
2020-08-09 | support four-reg operand forms, new tests | iximeow | |
2020-08-09 | cmc and int1 | iximeow | |
2020-08-09 | vinserti128 | iximeow | |
2020-08-09 | vextractf128 | iximeow | |
2020-08-09 | vpsrlq | iximeow | |
2020-08-09 | vpminsw | iximeow | |
2020-08-09 | vpermq (avx2) | iximeow | |
2020-08-09 | vpsrlw avx | iximeow | |
2020-08-09 | handle bad lea | iximeow | |
2020-08-09 | more pop | iximeow | |
2020-08-09 | long instructions | iximeow | |
2020-08-09 | loop{,z,nz}/jecxz | iximeow | |
2020-08-09 | movabs/offset | iximeow | |
2020-08-09 | fix setcc decoding | iximeow | |
2020-08-09 | warnings-b-gon | iximeow | |
2020-08-09 | x87 support, plus several other missing instructions | iximeow | |
2020-08-09 | sse4.2 tests and missing instructions | iximeow | |
2020-08-09 | sse4.1 instruction tests | iximeow | |
2020-07-26 | bitwise ops, test cases, btr | iximeow | |
2020-07-26 | ssse3, some missing sse4.1, and pextrw operands | iximeow | |
2020-07-26 | support upper end of 0f opcode map mmx instructions | iximeow | |
2020-05-24 | fix benchmark bitrotmaster | iximeow | |
2020-05-23 | fix important memory decode error in long mode | iximeow | |
add tests for modrm/sib decoding, xsave extensions | |||
2020-05-23 | add SHA, BMI1, and BMI2, complete XSAVE extension support | iximeow | |
additionally: cmpcxchg{8,16}b, rdrand, rdseed, rdpid, {rd,wr}{fs,gs}base | |||
2020-05-21 | add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensions | iximeow | |
also add builders to get decoders appropriate for specific microarchitectures from intel and amd * low-power architectures are not yet present | |||
2020-05-03 | add width() to ask width of an x86 operand | iximeow | |
this is largely wrong for memory operands, which require more invasive changes | |||
2020-05-03 | that instruction is cwd, not cbd | iximeow | |
2020-05-03 | bump yaxpeax-arch to 0.0.4, use AddressDiff, fix warnings in ffi | iximeow | |
2020-03-22 | yaxpeax-x86 decodes in 32-bit mode now | iximeow | |
2020-02-22 | remove unused function | iximeow | |
2020-02-22 | support most avx operand codes | iximeow | |
avx is still incomplete, but less so avx is still practically untested | |||
2020-02-22 | fix {jmp,call} <reg>, as well as jmpf/callf | iximeow | |
also support vmxon to finish out the f30f opcode map add tests for forms of inc/dec, as well as TODOs, as yaxpeax-x86 doesn't provide a way to distinguish different operand sizes (yet) | |||
2020-02-22 | more sse/sse2 support | iximeow | |
largely f20f/f30f opcode map items | |||
2020-02-22 | add vmclear test | iximeow | |
this instruction is decoded with the sse2 660f map but not actually added in sse2 | |||
2020-02-22 | support 660f sse2 instructions | iximeow | |
this isn't quite all of sse2, but gets close. the f20f opcode map still needs some touching up. also fix `G_E_xmm_Ib` not respecting rex.r for the rrr operand | |||
2020-02-16 | embarassingly had OperandSpec variants for modrm displacement == 0 backwards | iximeow | |