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authoriximeow <me@iximeow.net>2015-03-11 22:41:18 -0700
committeriximeow <me@iximeow.net>2015-03-11 22:41:18 -0700
commit16e9a180e357224bbf49f185ddbd8f33bdd69809 (patch)
treeaf5a4066a078fa5cca64f0a29f825f3e229e77f6 /src
parent886541cf20f264510c2982f02b64eb1917371bd2 (diff)
starting to rewrite stuff
Diffstat (limited to 'src')
-rw-r--r--src/AddressingModes.scala6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/AddressingModes.scala b/src/AddressingModes.scala
index e37bbe2..f511768 100644
--- a/src/AddressingModes.scala
+++ b/src/AddressingModes.scala
@@ -44,13 +44,15 @@ object OneOpAddressingModes {
trait Modes {
private val modeMap: Map[Int, AddressingMode] = Map()
- def Mode(as: Int, name: String, stringifier: String => String) = AddressingMode(as, name, stringifier).tap(modeMap += as -> _)
+ case class Mode(as: Int, name: String, stringifier: String => String) extends AddressingMode(as, name, stringifier) {
+ def Mode(as: Int, name: String, stringifier: String => String) = this(as, name, stringifier).tap(modeMap += as -> _)
+ }
def apply(x: Int): Option[AddressingMode] = modeMap.get(x)
}
object PCModes extends Modes {
- Mode(3, "NextWord", reg => s"@$reg+ (next word)")
+ Mode(3, "NextWord", reg => s"@PC+ (next word)")
}
object SRModes extends Modes {
Mode(2, "Const4", reg => "#4")