example snippet of rx encoding table

1 files changed, 36 insertions, 0 deletions

diff --git a/source/blog/yax/arch/rx.md b/source/blog/yax/arch/rx.md
index 237d4de..1195981 100644
--- a/source/blog/yax/arch/rx.md
+++ b/source/blog/yax/arch/rx.md
@@ -51,6 +51,42 @@ meticulously?
 
 instruction encodings are listed in alphabetic order of instruction mnemonics. this is not amenable to writing a disassembler.. so i went through all three versions of the manual and transcribed encodings *from* the manual into a text file i could easily reorder. and so [notes/encoding_table](https://github.com/iximeow/yaxpeax-rx/blob/no-gods-no-/notes/encoding_table) was born. reorder that to be approximately by bits, and [notes/reordered_encodings](https://github.com/iximeow/yaxpeax-rx/blob/no-gods-no-/notes/reordered_encodings). finally, i tried finding patterns across encodings and simplifying the total number of encodings across all instructions, and that left me with [notes/grouped_encodings](https://github.com/iximeow/yaxpeax-rx/blob/no-gods-no-/notes/grouped_encodings).
 
+vendors! please do not make me write things like this!! i'm not good at it!!!
+```
+0 0 0 0 0 1 1 0 | mi  [ opc ] ld  | [ rs  ] [ rd  ]                   SUB src, dest (v1, v2, v3)
+                  0 0 => B    0 0 => [Rs]                                                        
+                  0 1 => W    0 1 => dsp:8[Rs]                                                   
+                  1 0 => L    1 0 => dsp:16[Rs]                                                  
+                  1 1 => UW   1 1 => Rs                                                          
+    opc={sub, cmp, add, mul, and, or, X, X, see below}                                           
+                                                                                                 
+0 0 0 0 0 1 1 0 | mi  1 0 0 0 ld  | 0 0 0 [  opc  ] | [ rs  ] [ rd  ] SBB src, dest (v1, v2, v3) 
+                  1 0 => L                                                                       
+                  _ _ => invalid                                                                 
+                              00 => [Rs]                                                         
+                              01 => dsp:8[Rs]                                                    
+                              10 => dsp:16[Rs]                                                   
+    opc={                                                                                        
+      sbb(mi=10,ld!=11), X, adc(mi=10,ld!=11), X,                                                
+      max, min, emul, emulu,                                                                     
+      div, divu, X, X                                                                            
+      tst, xor, X, X,                                                                            
+      xchg, itof, X, X,                                                                          
+      X, utof(v2, v3), X, X,                                                                     
+      X, X, X, X,                                                                                
+      X, X, X, X,                                                                                
+    }                                                                                            
+                                                                                                 
+0 0 0 0 1 [dsp]                                                       BRA.S src (v1, v2, v3)     
+                                                                                                 
+0 0 0 1 c [dsp]                                                       BCnd.S src (v1, v2, v3)    
+        0 => beq/bz   (src = if dsp > 2 { dsp } else { dsp + 8 })                                
+        1 => bne/bnz                                                                             
+                                                                                                 
+0 0 1 0 [ cnd ] | [    pcdsp    ]                                     BCnd.B src (v1, v2, v3)    
+        cnd => {eq, ne, geu, ltu, gtu, leu, pz, n, ge, lt, gt, le, o, no, bra.b, Reserved}       
+```
+
 the disassembler itself is largely transcription of this table into source code. including, unfortunately, a massive chain of if/else from `0b00000000` stopping at dozens of points on the way to `0b11111111`. :')
 
 # encoding notes