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# PIC18
Notes on the PIC18 family of chips.
<a name="pic18f2550">
# PIC18F2550
</a>
[Datasheet](http://ww1.microchip.com/downloads/en/devicedoc/39632c.pdf)
### Architecture
One working register, `W`. Most instructions read from/write to `W`, except `movff` which can move from a file (memory, ish) to a file.
* Even `movff` can read/write to memory through address `0xfe8` aka `WREG`
Memory `0xf60` to `0xfff` are "Special Function Registers", described around page 68. Commonly seen SFRs:
#### `TBLPTR*`
Parts of the table pointer used in `tblrd`/`tblwr` instructions.
<a name="pic18f2550_fsr">
#### `FSR0`, `FSR1`, `FSR2`
</a>
`FSR*` contain a 16-bit word typically used to indirectly reference memory.
.. and the `INDF*`, `POSTINC*`, `POSTDEC*`, `PREINC*`, and `PLUSW*` registers. `*` for all of those can be `0`, `1`, or `2`, and all of these are used to indirectly access memory at `FSR0`, `FSR1`, or `FSR2`, respectively. `INDF` is a simple indirect access, while `POSTINC`, `POSTDEC`, and `PREINC` increment or decrement the appropriate `FSR`. `PLUSW*` is an indirect memory access to the selected `[FSR* + W]` as the name indicates.
#### `TRIS*`
`TRIS*` SFR control the state of pins mapped to ports `A`, `B`, and `C`. `0` indicates output ??? while `1` indicates input.
For example: `0xf6` being loaded into `TRISB` would set pins to `11110110`, making all pins inputs except pins 0 and 3, which would be set to output.
#### `PORT*`
`PORT*` SFR are the current state of the pins for ports `A`, `B`, and `C`. If `TRIS_X_` is set to be inputs for a port X, and `PORT_X_` is read, the value indicates if those pins are currently high or low.
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