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| author | iximeow <me@iximeow.net> | 2021-10-25 00:47:29 -0700 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2021-10-25 00:47:29 -0700 |
| commit | c74982cfcc02e00ca3776412417bba07d3182bbf (patch) | |
| tree | f57e078c237a2103a9b50752460c928d95c405c3 | |
| parent | f0e49d656ca494f065ba26bc7542e29ca7422d8a (diff) | |
fix size of operand for ldpsw
| -rw-r--r-- | src/armv8/a64.rs | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/armv8/a64.rs b/src/armv8/a64.rs index 68fe029..9e2afcc 100644 --- a/src/armv8/a64.rs +++ b/src/armv8/a64.rs @@ -2387,7 +2387,7 @@ impl Decoder<ARMv8> for InstDecoder { 0b011 => { inst.opcode = Opcode::LDPSW; imm7 <<= 2; - SizeCode::W + SizeCode::X }, 0b100 => { inst.opcode = Opcode::STP; @@ -2446,7 +2446,7 @@ impl Decoder<ARMv8> for InstDecoder { 0b011 => { inst.opcode = Opcode::LDPSW; imm7 <<= 2; - SizeCode::W + SizeCode::X }, 0b100 => { inst.opcode = Opcode::STP; @@ -2505,7 +2505,7 @@ impl Decoder<ARMv8> for InstDecoder { 0b011 => { inst.opcode = Opcode::LDPSW; imm7 <<= 2; - SizeCode::W + SizeCode::X }, 0b100 => { inst.opcode = Opcode::STP; |