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| author | iximeow <me@iximeow.net> | 2026-08-03 00:53:34 +0000 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-08-03 00:53:34 +0000 |
| commit | 0a874bce72cff033004599c4a2dc061ea0782c7f (patch) | |
| tree | 94d8c0bc3db5ebb49d9987a79e209821cd44e7ec | |
| parent | 5f48fb91742f9e9977b499959861a8a40d4ec03c (diff) | |
armv8 thumb-mode hints
| -rw-r--r-- | CHANGELOG | 1 | ||||
| -rw-r--r-- | src/armv7.rs | 6 | ||||
| -rw-r--r-- | src/armv7/display.rs | 11 | ||||
| -rw-r--r-- | src/armv7/thumb.rs | 55 | ||||
| -rw-r--r-- | tests/armv7/thumb.rs | 21 |
5 files changed, 94 insertions, 0 deletions
@@ -19,6 +19,7 @@ * thumb2: rfeia and rfedb were decoded backwards. likewise for srsia and srsdb * thumb2: unknown wide hints are decoded as `hint` like other cases in ARM, rather than rejected as invalid +* thumb2: support ARMv8 hints PACBTI, BTI, ESB, PAC, and AUT * ARMv8: support thumb2 encoding of `Test Target` instruction, `Opcode::TT` (formatted as any of `tt`, `ttt`, `tta`, `ttat`) * ARMv8: formerly-coprocessor instructions have been defined into SIMD extensions, diff --git a/src/armv7.rs b/src/armv7.rs index 01c1827..6edb6c9 100644 --- a/src/armv7.rs +++ b/src/armv7.rs @@ -290,6 +290,12 @@ pub enum Opcode { /// ARMv8 `Test Target` TT { alternate: bool, unprivileged: bool }, + + PACBTI, + BTI, + ESB, + PAC, + AUT, } static DATA_PROCESSING_OPCODES: [Opcode; 16] = [ diff --git a/src/armv7/display.rs b/src/armv7/display.rs index 91affeb..36be517 100644 --- a/src/armv7/display.rs +++ b/src/armv7/display.rs @@ -976,6 +976,11 @@ impl <T: fmt::Write, Y: YaxColors> Colorize<T, Y> for ConditionedOpcode { Opcode::YIELD | Opcode::WFE | Opcode::WFI | + Opcode::PACBTI | + Opcode::BTI | + Opcode::ESB | + Opcode::PAC | + Opcode::AUT | Opcode::SEV | Opcode::ERET | Opcode::RFE(_, _) | @@ -1268,6 +1273,12 @@ impl Opcode { Opcode::TT { alternate: true, unprivileged: false } => "tta", Opcode::TT { alternate: false, unprivileged: true } => "ttt", Opcode::TT { alternate: true, unprivileged: true } => "ttat", + + Opcode::PACBTI => { "pacbti" }, + Opcode::BTI => { "bti" }, + Opcode::ESB => { "esb" }, + Opcode::PAC => { "pac" }, + Opcode::AUT => { "aut" }, } } } diff --git a/src/armv7/thumb.rs b/src/armv7/thumb.rs index cba18a4..d4bef7a 100644 --- a/src/armv7/thumb.rs +++ b/src/armv7/thumb.rs @@ -1797,6 +1797,39 @@ pub fn decode_into<T: Reader<<ARMv7 as Arch>::Address, <ARMv7 as Arch>::Word>>(d Operand::Nothing, ]; } + 0b00001101 => { + // `PACBTI T1` + // v8 + inst.opcode = Opcode::PACBTI; + inst.operands = [ + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + } + 0b00001111 => { + // `BTI T1` + // v8 + inst.opcode = Opcode::BTI; + inst.operands = [ + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + } + 0b00010000 => { + // `ESB T1` + // v8 + inst.opcode = Opcode::ESB; + inst.operands = [ + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + } 0b00010100 => { // `CSDB` (`A8-376`) // v6T2 @@ -1808,6 +1841,28 @@ pub fn decode_into<T: Reader<<ARMv7 as Arch>::Address, <ARMv7 as Arch>::Word>>(d Operand::Nothing, ]; } + 0b00011101 => { + // `PAC T1` + // v8 + inst.opcode = Opcode::PAC; + inst.operands = [ + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + } + 0b00101101 => { + // `AUT T1` + // v8 + inst.opcode = Opcode::AUT; + inst.operands = [ + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + } hint => { // from DDI0406 C.d (v7): // > Encodings with op1 set to 0b000 and a value of diff --git a/tests/armv7/thumb.rs b/tests/armv7/thumb.rs index 7fb2d90..914b751 100644 --- a/tests/armv7/thumb.rs +++ b/tests/armv7/thumb.rs @@ -2595,6 +2595,27 @@ fn test_decode_misc_cases() { &[0xaf, 0xf3, 0x6e, 0x80], "hint.w 0x6e" ); + // defined in ARMv8 or so.. + test_display( + &[0xaf, 0xf3, 0x0d, 0x80], + "pacbti.w" + ); + test_display( + &[0xaf, 0xf3, 0x0f, 0x80], + "bti.w" + ); + test_display( + &[0xaf, 0xf3, 0x10, 0x80], + "esb.w" + ); + test_display( + &[0xaf, 0xf3, 0x1d, 0x80], + "pac.w" + ); + test_display( + &[0xaf, 0xf3, 0x2d, 0x80], + "aut.w" + ); } #[test] fn test_decode_mov_cases() { |