diff options
| author | iximeow <me@iximeow.net> | 2019-08-04 19:08:56 -0700 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2020-01-12 17:28:07 -0800 |
| commit | dc9366f430874c25e4e44e2a365efea5fcc43382 (patch) | |
| tree | e22690ea8fe0d7f3d84b387f9f9d27339fc0be0a /src/armv7.rs | |
| parent | 92a03acfb8cd4663188b958f383c3c24c94eed7d (diff) | |
fix the hex/bits mismatch
Diffstat (limited to 'src/armv7.rs')
| -rw-r--r-- | src/armv7.rs | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/armv7.rs b/src/armv7.rs index e609086..52061c7 100644 --- a/src/armv7.rs +++ b/src/armv7.rs @@ -798,7 +798,7 @@ impl Decodable for Instruction { println!("{:032b}", word); println!(" {:05b}|{:04b}|{:04b}|{:04b}|1{:02b}1|{:04b}", flags, Rn, Rd, HiOffset, op, LoOffset); match op { - 0x00 => { + 0b00 => { // |c o n d|0 0 0 1|x x x x x x x x x x x x x x x x|1 0 0 1|x x x x| // this is swp or {ld,st}ex, conditional on bit 23 match flags { @@ -862,7 +862,7 @@ impl Decodable for Instruction { } } } - 0x01 => { + 0b01 => { // |c o n d|0 0 0 x|x x x x x x x x x x x x x x x x|1 0 1 1|x x x x| // page A5-201 self.opcode = Opcode::Incomplete(word); @@ -895,13 +895,13 @@ impl Decodable for Instruction { } } } - 0x10 => { + 0b10 => { // |c o n d|0 0 0 x|x x x x x x x x x x x x x x x x|1 1 0 1|x x x x| // page A5-201 self.opcode = Opcode::Incomplete(word); return Some(()); } - 0x11 => { + 0b11 => { // |c o n d|0 0 0 x|x x x x x x x x x x x x x x x x|1 1 1 1|x x x x| // page A5-201 self.opcode = Opcode::Incomplete(word); |