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authoriximeow <me@iximeow.net>2021-09-28 19:48:39 -0700
committeriximeow <me@iximeow.net>2021-09-28 19:48:39 -0700
commitce99ad8e8e5260f3a8bac896e14faf54f0df6c58 (patch)
tree8daf5ccfd77d27ffaafa915a1e1f6608ce80a105 /src/armv7/thumb.rs
parent23bd0b37482a127c8f954ce7e068a507b9c1e09e (diff)
fix various armv8 and armv8 panics that should be Err.
in fact the decoder should _never_ panic. included here are tests that cover the entire 32-bit instruction space and ensure that decoding and display do not panic. these tests run uncomfortably slowly (1168s to decode the 4b "instruction" sequences on my desktop), but verify that panics are no longer an issue.
Diffstat (limited to 'src/armv7/thumb.rs')
-rw-r--r--src/armv7/thumb.rs3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/armv7/thumb.rs b/src/armv7/thumb.rs
index 8017f01..e721691 100644
--- a/src/armv7/thumb.rs
+++ b/src/armv7/thumb.rs
@@ -2956,6 +2956,9 @@ pub fn decode_into<T: Reader<<ARMv7 as Arch>::Address, <ARMv7 as Arch>::Word>>(d
return Err(DecodeError::InvalidOpcode);
}
+ if op1 == 0 {
+ return Err(DecodeError::InvalidOpcode);
+ }
let opcode_idx = (op1 - 1) * 3 + op2;
let rn = instr2[0..4].load::<u8>();