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authoriximeow <me@iximeow.net>2026-09-11 15:53:27 +0000
committeriximeow <me@iximeow.net>2026-09-11 16:18:53 +0000
commit7e70f851a481d36669e64edcd61ce7df9d578468 (patch)
tree156e7d596d75696cc4e585b4bf0cb5f84ecc8360 /src/armv7
parent08fc7b77e5218c196fdacb94e6c9b0a6049603bd (diff)
fix mrc/mrc2 use of CRd=15
Diffstat (limited to 'src/armv7')
-rw-r--r--src/armv7/display.rs1
-rw-r--r--src/armv7/thumb.rs7
2 files changed, 7 insertions, 1 deletions
diff --git a/src/armv7/display.rs b/src/armv7/display.rs
index 5a48362..1398ce6 100644
--- a/src/armv7/display.rs
+++ b/src/armv7/display.rs
@@ -1330,6 +1330,7 @@ impl StatusRegMask {
StatusRegMask::CPSR_SC => "cpsr_sc",
StatusRegMask::CPSR_SX => "cpsr_sx",
StatusRegMask::CPSR_SXC => "cpsr_sxc",
+ StatusRegMask::APSR_NZCV => "apsr_nzcv",
StatusRegMask::APSR_NZCVQ => "apsr_nzcvq",
StatusRegMask::CPSR_FC => "cpsr_fc",
StatusRegMask::CPSR_FX => "cpsr_fx",
diff --git a/src/armv7/thumb.rs b/src/armv7/thumb.rs
index d029221..4340e95 100644
--- a/src/armv7/thumb.rs
+++ b/src/armv7/thumb.rs
@@ -4418,8 +4418,13 @@ fn decode_table_a6_30(decoder: &InstDecoder, inst: &mut Instruction, instr2: Bit
} else {
// MRC, MRC2 (A8-493)
inst.opcode = Opcode::MRC(coproc, opc1, opc2, is_2);
+ let dest = if CRd == 0b1111 {
+ Operand::StatusRegMask(StatusRegMask::APSR_NZCV)
+ } else {
+ Operand::Reg(Reg::from_u8(CRd))
+ };
inst.operands = [
- Operand::Reg(Reg::from_u8(CRd)),
+ dest,
Operand::CReg(CReg::from_u8(CRn)),
Operand::CReg(CReg::from_u8(CRm)),
Operand::Nothing,