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| author | iximeow <me@iximeow.net> | 2021-10-24 19:20:27 -0700 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2021-10-24 19:20:27 -0700 |
| commit | bd0be59eb6ed363faba14adf9ab04efe8a714316 (patch) | |
| tree | 27e6aa860714ee6527c0ce9f6a38f8bdd1a41a71 /src/armv8/a64.rs | |
| parent | 8794466963264356d7c271625b9dec85b5edd049 (diff) | |
unsigned immediate encodings do not have signed immediates
Diffstat (limited to 'src/armv8/a64.rs')
| -rw-r--r-- | src/armv8/a64.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/armv8/a64.rs b/src/armv8/a64.rs index c51d526..6bce61e 100644 --- a/src/armv8/a64.rs +++ b/src/armv8/a64.rs @@ -2827,7 +2827,7 @@ impl Decoder<ARMv8> for InstDecoder { // V == 0 let Rt = (word & 0x1f) as u16; let Rn = ((word >> 5) & 0x1f) as u16; - let imm12 = ((((word >> 10) as i16) & 0x0fff) << 4) >> 4; + let imm12 = ((word >> 10) & 0x0fff) as i16; let size_opc = ((word >> 22) & 0x3) | ((word >> 28) & 0xc); match size_opc { 0b0000 => { |