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author | iximeow <me@iximeow.net> | 2021-12-27 17:55:36 -0800 |
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committer | iximeow <me@iximeow.net> | 2021-12-27 17:55:36 -0800 |
commit | 56cbef33bfaaa633fbe95b0256ac462024925c2e (patch) | |
tree | 4fe12fe392179d5780d7d39e9e05c4cb39c4c10e /src/armv8/a64.rs | |
parent | 15a12c78353db700ffb96f454e528a5b6afb4f1d (diff) |
Advanced SIMD Extract
Diffstat (limited to 'src/armv8/a64.rs')
-rw-r--r-- | src/armv8/a64.rs | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/armv8/a64.rs b/src/armv8/a64.rs index abe0cae..b698f6c 100644 --- a/src/armv8/a64.rs +++ b/src/armv8/a64.rs @@ -4138,11 +4138,11 @@ impl Decoder<ARMv8> for InstDecoder { } } } else { - if op3 & 0b000100001 == 0b000000001 && op0 & 0b1011 == 0b0010 { + if op3 & 0b000100001 == 0b000000000 && op0 & 0b1011 == 0b0010 { // `Advanced SIMD extract` let Rd = (word >> 0) & 0b11111; - let Rn = (word >> 6) & 0b11111; - let imm4 = (word >> 11) & 0b111; + let Rn = (word >> 5) & 0b11111; + let imm4 = (word >> 11) & 0b1111; let Rm = (word >> 16) & 0b11111; let op2 = (word >> 22) & 0b11; let Q = (word >> 30) & 1 == 1; |