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author | iximeow <me@iximeow.net> | 2024-03-17 02:44:57 +0000 |
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committer | iximeow <me@iximeow.net> | 2024-03-17 02:44:57 +0000 |
commit | a91c1c50a39ff68a7e73cef70829e8a5b08b4b6b (patch) | |
tree | 6fa88baec038e8cb43d4f349d627a12df51df1db /src/armv8/a64.rs | |
parent | 79d220ce177833f7dd80e15e1094bbfbf4c6f8b1 (diff) |
be more explicit about undefined system instructions being invalid
Diffstat (limited to 'src/armv8/a64.rs')
-rw-r--r-- | src/armv8/a64.rs | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/armv8/a64.rs b/src/armv8/a64.rs index 19440ba..a228027 100644 --- a/src/armv8/a64.rs +++ b/src/armv8/a64.rs @@ -10454,7 +10454,12 @@ impl Decoder<ARMv8> for InstDecoder { ]; } 0b100 => { + // quote C5.1.2: + // All encodings with L==1 and op0==0b0x are UNDEFINED, except + // for encodings in the area reserved for IMPLEMENTATION + // DEFINED use inst.opcode = Opcode::Invalid; + return Err(DecodeError::InvalidOpcode); } 0b101 => { let Rt = word & 0b11111; @@ -10484,6 +10489,7 @@ impl Decoder<ARMv8> for InstDecoder { } _ => { inst.opcode = Opcode::Invalid; + return Err(DecodeError::InvalidOpcode); } } } |