diff options
| author | iximeow <me@iximeow.net> | 2026-09-11 16:12:12 +0000 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-09-11 16:19:27 +0000 |
| commit | cf151c1dc6926bf7d14eb5a50afe42b79e6fd481 (patch) | |
| tree | 6b517e0eec7e2ef4fd505de6ebb0cd65816b3e73 /src | |
| parent | ecec44cbee7be32e632b24ae0e4fe3f84e6e8ef8 (diff) | |
fix ssat/16 second operand off by one, testcases
Diffstat (limited to 'src')
| -rw-r--r-- | src/armv7/thumb.rs | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/armv7/thumb.rs b/src/armv7/thumb.rs index 077834a..dacf3dd 100644 --- a/src/armv7/thumb.rs +++ b/src/armv7/thumb.rs @@ -1452,7 +1452,8 @@ pub fn decode_into<T: Reader<<ARMv7 as Arch>::Address, <ARMv7 as Arch>::Word>>(d inst.opcode = Opcode::SSAT; inst.operands = [ Operand::Reg(Reg::from_u8(rd)), - Operand::Imm32((lower & 0b11111) as u32), + // TODO: ssat r3, #0x3, r7, lsl #22 != ssat r3, #4, r7, lsl #0x16. bytes: [7, f3, 83, 53] + Operand::Imm32((lower & 0b11111) as u32 + 1), Operand::RegShift(shift), Operand::Nothing, ]; @@ -1466,7 +1467,8 @@ pub fn decode_into<T: Reader<<ARMv7 as Arch>::Address, <ARMv7 as Arch>::Word>>(d inst.opcode = Opcode::SSAT; inst.operands = [ Operand::Reg(Reg::from_u8(rd)), - Operand::Imm32((lower & 0b11111) as u32), + // TODO: ssat r3, #0x3, r7, lsl #22 != ssat r3, #4, r7, lsl #0x16. bytes: [7, f3, 83, 53] + Operand::Imm32((lower & 0b11111) as u32 + 1), Operand::RegShift(shift), Operand::Nothing, ]; @@ -1476,7 +1478,8 @@ pub fn decode_into<T: Reader<<ARMv7 as Arch>::Address, <ARMv7 as Arch>::Word>>(d inst.opcode = Opcode::SSAT16; inst.operands = [ Operand::Reg(Reg::from_u8(rd)), - Operand::Imm32((lower & 0b11111) as u32), + // TODO: testcase + Operand::Imm32((lower & 0b11111) as u32 + 1), Operand::Reg(Reg::from_u8(rn)), Operand::Nothing, ]; |