diff options
| author | iximeow <me@iximeow.net> | 2026-09-11 16:08:55 +0000 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-09-11 16:18:53 +0000 |
| commit | ecec44cbee7be32e632b24ae0e4fe3f84e6e8ef8 (patch) | |
| tree | 30fd0b61c3463a9a8591b4f0f18f931f2ed7ae54 /src | |
| parent | a00a54539d9124d8b376ee9cbeab355d99c9d163 (diff) | |
fix issues around unpredictable ldrd and offset printing
Diffstat (limited to 'src')
| -rw-r--r-- | src/armv7/display.rs | 10 | ||||
| -rw-r--r-- | src/armv7/thumb.rs | 16 |
2 files changed, 18 insertions, 8 deletions
diff --git a/src/armv7/display.rs b/src/armv7/display.rs index 2d2a77c..3f7162b 100644 --- a/src/armv7/display.rs +++ b/src/armv7/display.rs @@ -245,13 +245,11 @@ impl<T: DisplaySink> crate::armv7::OperandVisitor for DisplayingOperandVisitor<' self.f.write_reg(base.number())?; self.f.write_char(']')?; - if offset != 0 { - self.f.write_fixed_size(", ")?; - if !add { - self.f.write_char('-')?; - } - self.f.write_prefixed_u16(offset)?; + self.f.write_fixed_size(", ")?; + if !add { + self.f.write_char('-')?; } + self.f.write_prefixed_u16(offset)?; Ok(()) } diff --git a/src/armv7/thumb.rs b/src/armv7/thumb.rs index 1d9d96a..077834a 100644 --- a/src/armv7/thumb.rs +++ b/src/armv7/thumb.rs @@ -286,7 +286,13 @@ pub fn decode_into<T: Reader<<ARMv7 as Arch>::Address, <ARMv7 as Arch>::Word>>(d inst.operands = [ Operand::Reg(Reg::from_u8(rt)), Operand::Reg(Reg::from_u8(rd)), - Operand::RegDerefPreindexOffset(Reg::from_u8(rn), imm8 << 2, u, false), + if p { + Operand::RegDerefPreindexOffset(Reg::from_u8(rn), imm8 << 2, u, w) + } else { + decoder.unpredictable()?; + // p == 0 and w == 0 is impossible, would be tbb/tbh + Operand::RegDerefPostindexOffset(Reg::from_u8(rn), imm8 << 2, u, false) + }, Operand::Nothing, ]; } @@ -595,7 +601,13 @@ pub fn decode_into<T: Reader<<ARMv7 as Arch>::Address, <ARMv7 as Arch>::Word>>(d inst.operands = [ Operand::Reg(Reg::from_u8(rt)), Operand::Reg(Reg::from_u8(rd)), - Operand::RegDerefPreindexOffset(Reg::from_u8(rn), imm8 << 2, u, false), + if p { + Operand::RegDerefPreindexOffset(Reg::from_u8(rn), imm8 << 2, u, w) + } else { + decoder.unpredictable()?; + // p == 0 and w == 0 is impossible, would be tbb/tbh + Operand::RegDerefPostindexOffset(Reg::from_u8(rn), imm8 << 2, u, false) + }, Operand::Nothing, ]; } |