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| author | iximeow <me@iximeow.net> | 2021-09-28 19:48:39 -0700 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2021-09-28 19:48:39 -0700 |
| commit | ce99ad8e8e5260f3a8bac896e14faf54f0df6c58 (patch) | |
| tree | 8daf5ccfd77d27ffaafa915a1e1f6608ce80a105 /test/armv7.rs | |
| parent | 23bd0b37482a127c8f954ce7e068a507b9c1e09e (diff) | |
fix various armv8 and armv8 panics that should be Err.
in fact the decoder should _never_ panic. included here are tests that
cover the entire 32-bit instruction space and ensure that decoding and
display do not panic. these tests run uncomfortably slowly (1168s to
decode the 4b "instruction" sequences on my desktop), but verify that
panics are no longer an issue.
Diffstat (limited to 'test/armv7.rs')
| -rw-r--r-- | test/armv7.rs | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/test/armv7.rs b/test/armv7.rs index 7feb774..a60b50a 100644 --- a/test/armv7.rs +++ b/test/armv7.rs @@ -106,6 +106,11 @@ fn test_display(data: [u8; 4], expected: &'static str) { } #[test] +fn test_unpredictable_instructions() { + test_invalid([0x00, 0x02, 0x08, 0x01]); // msr with invalid machine register +} + +#[test] fn test_decode_str_ldr() { test_decode( [0x24, 0xc0, 0x9f, 0xe5], |