diff options
author | iximeow <me@iximeow.net> | 2021-11-07 13:19:05 -0800 |
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committer | iximeow <me@iximeow.net> | 2021-11-07 13:19:05 -0800 |
commit | 93386de05f07ec55944fddc81b99de80c607a937 (patch) | |
tree | 548dd71e36050fb2bf7de3a4158444941cd79ac7 /test/armv8 | |
parent | a54ad2dffffc8c66917c75786045f7c0cdc7d5eb (diff) |
floating point mov, several data processing ops, compare
Diffstat (limited to 'test/armv8')
-rw-r--r-- | test/armv8/a64.rs | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/test/armv8/a64.rs b/test/armv8/a64.rs index 405c550..e78daaf 100644 --- a/test/armv8/a64.rs +++ b/test/armv8/a64.rs @@ -3813,28 +3813,20 @@ fn test_openblas_simd_ops() { ([0xc6, 0x12, 0x8e, 0x0f], "fmla v6.2s, v22.2s, v14.s[0]"), ([0x3c, 0x58, 0xa9, 0x0f], "fmls v28.2s, v1.2s, v9.s[3]"), ([0x00, 0x06, 0x20, 0x1e], "fccmp s16, s0, 0x0, eq"), - ([0x54, 0xc2, 0x20, 0x1e], "fabs s20, s18"), - ([0x23, 0x40, 0x21, 0x1e], "fneg s3, s1"), ([0x05, 0x08, 0x22, 0x1e], "fmul s5, s0, s2"), ([0x35, 0x88, 0x24, 0x1e], "fnmul s21, s1, s4"), ([0x42, 0x88, 0x24, 0x1e], "fnmul s2, s2, s4"), - ([0x08, 0x90, 0x26, 0x1e], "fmov s8, 2.000000000000000000e+01"), ([0x00, 0xdc, 0x26, 0x1e], "fcsel s0, s0, s6, le"), ([0x4e, 0x0c, 0x2e, 0x1e], "fcsel s14, s2, s14, eq"), - ([0x00, 0x10, 0x2e, 0x1e], "fmov s0, 1.000000000000000000e+00"), ([0x41, 0x18, 0x2e, 0x1e], "fdiv s1, s2, s14"), ([0xd3, 0x5e, 0x33, 0x1e], "fcsel s19, s22, s19, pl"), ([0xe4, 0x3b, 0x3b, 0x1e], "fsub s4, s31, s27"), - ([0x08, 0x90, 0x3b, 0x1e], "fmov s8, -4.375000000000000000e-01"), ([0xa1, 0x08, 0x3c, 0x1e], "fmul s1, s5, s28"), - ([0x01, 0x10, 0x3c, 0x1e], "fmov s1, -5.000000000000000000e-01"), ([0xb8, 0x1a, 0x3c, 0x1e], "fdiv s24, s21, s28"), ([0x5c, 0x39, 0x3c, 0x1e], "fsub s28, s10, s28"), ([0x76, 0x08, 0x3d, 0x1e], "fmul s22, s3, s29"), ([0x59, 0x18, 0x3d, 0x1e], "fdiv s25, s2, s29"), ([0x26, 0x08, 0x3e, 0x1e], "fmul s6, s1, s30"), - ([0x00, 0x10, 0x3e, 0x1e], "fmov s0, -1.000000000000000000e+00"), - ([0x13, 0x10, 0x3e, 0x1e], "fmov s19, -1.000000000000000000e+00"), ([0x39, 0x3b, 0x3f, 0x1e], "fsub s25, s25, s31"), ([0x20, 0x04, 0x60, 0x1e], "fccmp d1, d0, 0x0, eq"), ([0x20, 0x06, 0x60, 0x1e], "fccmp d17, d0, 0x0, eq"), @@ -3843,7 +3835,6 @@ fn test_openblas_simd_ops() { ([0xf3, 0x0b, 0x60, 0x1e], "fmul d19, d31, d0"), ([0x40, 0x0c, 0x60, 0x1e], "fcsel d0, d2, d0, eq"), ([0x08, 0x0d, 0x60, 0x1e], "fcsel d8, d8, d0, eq"), - ([0x14, 0x10, 0x60, 0x1e], "fmov d20, 2.000000000000000000e+00"), ([0xc4, 0x14, 0x60, 0x1e], "fccmp d6, d0, 0x4, ne"), ([0x72, 0x15, 0x60, 0x1e], "fccmpe d11, d0, 0x2, ne"), ([0xa4, 0x15, 0x60, 0x1e], "fccmp d13, d0, 0x4, ne"), @@ -3856,7 +3847,6 @@ fn test_openblas_simd_ops() { ([0xd8, 0x22, 0x60, 0x1e], "fcmpe d22, 0.0"), ([0x08, 0x23, 0x60, 0x1e], "fcmp d24, 0.0"), ([0x80, 0x28, 0x60, 0x1e], "fadd d0, d4, d0"), - ([0xfe, 0x43, 0x60, 0x1e], "fmov d30, d31"), ([0x22, 0x4c, 0x60, 0x1e], "fcsel d2, d1, d0, mi"), ([0x21, 0x5c, 0x60, 0x1e], "fcsel d1, d1, d0, pl"), ([0x20, 0x68, 0x60, 0x1e], "fmaxnm d0, d1, d0"), @@ -3866,12 +3856,10 @@ fn test_openblas_simd_ops() { ([0xc0, 0x8b, 0x60, 0x1e], "fnmul d0, d30, d0"), ([0x22, 0x9c, 0x60, 0x1e], "fcsel d2, d1, d0, ls"), ([0x08, 0xad, 0x60, 0x1e], "fcsel d8, d8, d0, ge"), - ([0xf7, 0xc3, 0x60, 0x1e], "fabs d23, d31"), ([0x20, 0xcc, 0x60, 0x1e], "fcsel d0, d1, d0, gt"), ([0x6b, 0xdd, 0x60, 0x1e], "fcsel d11, d11, d0, le"), ([0xec, 0x0b, 0x61, 0x1e], "fmul d12, d31, d1"), ([0x41, 0x0c, 0x61, 0x1e], "fcsel d1, d2, d1, eq"), - ([0x18, 0x10, 0x61, 0x1e], "fmov d24, 3.000000000000000000e+00"), ([0x04, 0x14, 0x61, 0x1e], "fccmp d0, d1, 0x4, ne"), ([0xe1, 0x1b, 0x61, 0x1e], "fdiv d1, d31, d1"), ([0x00, 0x1c, 0x61, 0x1e], "fcsel d0, d0, d1, ne"), @@ -3879,7 +3867,6 @@ fn test_openblas_simd_ops() { ([0x41, 0x2b, 0x61, 0x1e], "fadd d1, d26, d1"), ([0x00, 0x38, 0x61, 0x1e], "fsub d0, d0, d1"), ([0x81, 0x3b, 0x61, 0x1e], "fsub d1, d28, d1"), - ([0x06, 0x40, 0x61, 0x1e], "fneg d6, d0"), ([0x01, 0x4c, 0x61, 0x1e], "fcsel d1, d0, d1, mi"), ([0xef, 0x5d, 0x61, 0x1e], "fcsel d15, d15, d1, pl"), ([0x6c, 0x68, 0x61, 0x1e], "fmaxnm d12, d3, d1"), @@ -3888,8 +3875,6 @@ fn test_openblas_simd_ops() { ([0x01, 0x9c, 0x61, 0x1e], "fcsel d1, d0, d1, ls"), ([0x02, 0xac, 0x61, 0x1e], "fcsel d2, d0, d1, ge"), ([0x84, 0xbc, 0x61, 0x1e], "fcsel d4, d4, d1, lt"), - ([0x00, 0xc0, 0x61, 0x1e], "fsqrt d0, d0"), - ([0x02, 0xc2, 0x61, 0x1e], "fsqrt d2, d16"), ([0x04, 0xc4, 0x61, 0x1e], "fccmp d0, d1, 0x4, gt"), ([0x11, 0xc4, 0x61, 0x1e], "fccmpe d0, d1, 0x1, gt"), ([0x50, 0xcc, 0x61, 0x1e], "fcsel d16, d2, d1, gt"), @@ -3915,7 +3900,6 @@ fn test_openblas_simd_ops() { ([0x42, 0x88, 0x77, 0x1e], "fnmul d2, d2, d23"), ([0x00, 0x00, 0x78, 0x1e], "fcvtzs w0, d0"), ([0x85, 0x01, 0x78, 0x1e], "fcvtzs w5, d12"), - ([0x13, 0x10, 0x7e, 0x1e], "fmov d19, -1.000000000000000000e+00"), ([0x00, 0x18, 0x7e, 0x1e], "fdiv d0, d0, d30"), ([0x42, 0x18, 0x7e, 0x1e], "fdiv d2, d2, d30"), ([0x84, 0x18, 0x7e, 0x1e], "fdiv d4, d4, d30"), @@ -4115,6 +4099,22 @@ fn test_openblas_simd_ops() { ([0x21, 0x1c, 0x22, 0x0e], "and v1.8b, v1.8b, v2.8b"), ([0x21, 0x1c, 0x32, 0x0e], "and v1.8b, v1.8b, v18.8b"), ([0x08, 0x54, 0x22, 0x0f], "shl v8.2s, v0.2s, 2"), + ([0xfe, 0x43, 0x60, 0x1e], "fmov d30, d31"), + ([0x54, 0xc2, 0x20, 0x1e], "fabs s20, s18"), + ([0xf7, 0xc3, 0x60, 0x1e], "fabs d23, d31"), + ([0x23, 0x40, 0x21, 0x1e], "fneg s3, s1"), + ([0x06, 0x40, 0x61, 0x1e], "fneg d6, d0"), + ([0x00, 0xc0, 0x61, 0x1e], "fsqrt d0, d0"), + ([0x02, 0xc2, 0x61, 0x1e], "fsqrt d2, d16"), + ([0x08, 0x90, 0x26, 0x1e], "fmov s8, 20"), + ([0x00, 0x10, 0x2e, 0x1e], "fmov s0, 1"), + ([0x08, 0x90, 0x3b, 0x1e], "fmov s8, -0.4375"), + ([0x01, 0x10, 0x3c, 0x1e], "fmov s1, -0.5"), + ([0x00, 0x10, 0x3e, 0x1e], "fmov s0, -1"), + ([0x13, 0x10, 0x3e, 0x1e], "fmov s19, -1"), + ([0x14, 0x10, 0x60, 0x1e], "fmov d20, 2"), + ([0x18, 0x10, 0x61, 0x1e], "fmov d24, 3"), + ([0x13, 0x10, 0x7e, 0x1e], "fmov d19, -1"), ]; let errs = run_tests(TESTS); |