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authoriximeow <me@iximeow.net>2024-03-17 08:56:24 +0000
committeriximeow <me@iximeow.net>2024-03-17 08:56:24 +0000
commitc3f1cd87d7d504841e0221309c53f4d009bf2b22 (patch)
tree35805f544177a85bd588890ae2a4d65a1c6397fe /tests/armv8/a64.rs
parent85456e92b038f6e7c75c8714fb8dd4331e813c79 (diff)
fix uxtb/uxth alias being incorrectly applied with x-size registers
Diffstat (limited to 'tests/armv8/a64.rs')
-rw-r--r--tests/armv8/a64.rs16
1 files changed, 16 insertions, 0 deletions
diff --git a/tests/armv8/a64.rs b/tests/armv8/a64.rs
index 74bb89f..0e76ef6 100644
--- a/tests/armv8/a64.rs
+++ b/tests/armv8/a64.rs
@@ -4931,3 +4931,19 @@ fn test_misc() {
assert!(errs.is_empty());
}
+
+#[test]
+fn test_bitfield() {
+ const TESTS: &[([u8; 4], &'static str)] = &[
+ ([0x00, 0x1c, 0x40, 0xd3], "ubfx x0, x0, #0x0, #0x8"),
+ ([0x1f, 0x1c, 0x00, 0x53], "uxtb wzr, w0"),
+ ];
+
+ let errs = run_tests(TESTS);
+
+ for err in errs.iter() {
+ println!("{}", err);
+ }
+
+ assert!(errs.is_empty());
+}