diff options
| -rw-r--r-- | src/armv7.rs | 2 | ||||
| -rw-r--r-- | test/armv7.rs | 19 | ||||
| -rw-r--r-- | test/test.rs | 2 |
3 files changed, 19 insertions, 4 deletions
diff --git a/src/armv7.rs b/src/armv7.rs index 52061c7..a5467e5 100644 --- a/src/armv7.rs +++ b/src/armv7.rs @@ -487,7 +487,7 @@ fn format_shift<T: std::fmt::Write>(f: &mut T, Rm: u8, shift: ShiftSpec, colors: }, ShiftSpec::Register(v) => { let tpe = v & 0x3; - let Rs = v >> 2; + let Rs = v >> 3; write!(f, "{}, {} {}", reg_name_colorize(Rm, colors), shift_tpe_to_str(tpe), reg_name_colorize(Rs, colors)) }, } diff --git a/test/armv7.rs b/test/armv7.rs index 6fd46c3..7715585 100644 --- a/test/armv7.rs +++ b/test/armv7.rs @@ -166,12 +166,27 @@ fn test_decode_arithmetic() { [0x58, 0x37, 0x01, 0x40], Instruction { condition: ConditionCode::MI, - opcode: AND, - operands: Operands::ThreeOperands(3, 1, 8), + opcode: Opcode::AND, + operands: Operands::ThreeOperand(3, 1, 8), s: false } ); test_decode( + [0x18, 0x1d, 0x00, 0x00], + Instruction { + condition: ConditionCode::EQ, + opcode: Opcode::AND, + operands: Operands::ThreeOperandWithShift( + 1, 0, 8, ShiftSpec::Register(104) + ), + s: false + } + ); + test_display( + [0x18, 0x1d, 0x00, 0x00], + "andeq r1, r0, r8, lsl sp", + ); + test_decode( [0x03, 0x30, 0x8f, 0xe0], Instruction { condition: ConditionCode::AL, diff --git a/test/test.rs b/test/test.rs index 7dd54ea..72b7e50 100644 --- a/test/test.rs +++ b/test/test.rs @@ -5,5 +5,5 @@ extern crate test; extern crate yaxpeax_arch; extern crate yaxpeax_arm; -// mod armv7; +mod armv7; mod armv8; |