diff options
| -rw-r--r-- | src/armv8/a64.rs | 25 | ||||
| -rw-r--r-- | test/armv8/a64.rs | 16 | 
2 files changed, 32 insertions, 9 deletions
diff --git a/src/armv8/a64.rs b/src/armv8/a64.rs index af52bf4..d291c61 100644 --- a/src/armv8/a64.rs +++ b/src/armv8/a64.rs @@ -3825,6 +3825,13 @@ impl Decoder<ARMv8> for InstDecoder {                                      Err(DecodeError::InvalidOperand), Ok((Q, D, Q, D)),                                  ]; +                                const TABLE_I: &'static OperandSizeTable = &[ +                                    Ok((D, S, D, S)), Ok((Q, S, Q, S)), +                                    Err(DecodeError::InvalidOperand), Ok((Q, D, Q, D)), +                                    Err(DecodeError::InvalidOperand), Err(DecodeError::InvalidOperand), +                                    Err(DecodeError::InvalidOperand), Err(DecodeError::InvalidOperand), +                                ]; +                                  if op2 & 0b0111 == 0b0100 {                                      // `Advanced SIMD two-register miscellaneous`                                      const OPCODES_U0_LOW: &[Result<(Opcode, &'static OperandSizeTable), DecodeError>; 20] = &[ @@ -3840,11 +3847,11 @@ impl Decoder<ARMv8> for InstDecoder {                                          Ok((Opcode::CMEQ, TABLE_D)),                                          Ok((Opcode::CMLT, TABLE_D)),                                          Ok((Opcode::ABS, TABLE_D)), -                                        // 0b01100 -                                        Err(DecodeError::InvalidOpcode), -                                        Err(DecodeError::InvalidOpcode), -                                        Err(DecodeError::InvalidOpcode), -                                        Err(DecodeError::InvalidOpcode), +                                        // 0b01100, all four size=1x +                                        Ok((Opcode::FCMGT, TABLE_I)), +                                        Ok((Opcode::FCMEQ, TABLE_I)), +                                        Ok((Opcode::FCMLT, TABLE_I)), +                                        Ok((Opcode::FABS, TABLE_I)),                                          // 0b10000                                          Err(DecodeError::InvalidOpcode),                                          Err(DecodeError::InvalidOpcode), @@ -3896,11 +3903,11 @@ impl Decoder<ARMv8> for InstDecoder {                                          Ok((Opcode::CMLE, TABLE_D)),                                          Err(DecodeError::InvalidOpcode),                                          Ok((Opcode::NEG, TABLE_D)), -                                        // 0b01100 -                                        Err(DecodeError::InvalidOpcode), -                                        Err(DecodeError::InvalidOpcode), -                                        Err(DecodeError::InvalidOpcode), +                                        // 0b01100, all four size=1x +                                        Ok((Opcode::FCMGE, TABLE_I)), +                                        Ok((Opcode::FCMLE, TABLE_I)),                                          Err(DecodeError::InvalidOpcode), +                                        Ok((Opcode::FNEG, TABLE_I)),                                          // 0b10000                                          Err(DecodeError::InvalidOpcode),                                          Err(DecodeError::InvalidOpcode), diff --git a/test/armv8/a64.rs b/test/armv8/a64.rs index 593dcbf..11b42d5 100644 --- a/test/armv8/a64.rs +++ b/test/armv8/a64.rs @@ -4303,3 +4303,19 @@ fn test_indexed() {      assert!(errs.is_empty());  } + +#[test] +fn test_simd_abs() { +    const TESTS: &[([u8; 4], &'static str)] = &[ +        ([0x00, 0xf8, 0xa0, 0x0e], "fabs v0.2s, v0.2s"), +        ([0x21, 0xf8, 0xa0, 0x4e], "fabs v1.4s, v1.4s"), +        ([0xf7, 0xc3, 0x60, 0x1e], "fabs d23, d31"), +    ]; +    let errs = run_tests(TESTS); + +    for err in errs.iter() { +        println!("{}", err); +    } + +    assert!(errs.is_empty()); +}  | 
