diff options
| -rw-r--r-- | src/armv8/a64.rs | 9 | ||||
| -rw-r--r-- | tests/armv8/a64.rs | 6 |
2 files changed, 6 insertions, 9 deletions
diff --git a/src/armv8/a64.rs b/src/armv8/a64.rs index 85e2ced..0704262 100644 --- a/src/armv8/a64.rs +++ b/src/armv8/a64.rs @@ -10301,12 +10301,13 @@ impl Decoder<ARMv8> for InstDecoder { 0b000 => { // MSR, HINT, CLREX, DSB, DMB, ISB if Rt == 0b11111 { + let op1 = (word >> 16) & 0b111; let CRn = (word >> 12) & 0xf; - let op2 = (word >> 5) & 0x1f; + let CRm = (word >> 8) & 0xf; + let op2 = (word >> 5) & 0b111; match CRn { 0b0010 => { - let CRm = (word >> 12) & 0xf; inst.opcode = Opcode::HINT; inst.operands = [ Operand::ControlReg(CRm as u16), @@ -10316,8 +10317,6 @@ impl Decoder<ARMv8> for InstDecoder { ]; }, 0b0011 => { - let CRm = (word >> 8) & 0xf; - let op2 = (word >> 5) & 0b111; match op2 { 0b010 => { inst.opcode = Opcode::CLREX; @@ -10385,8 +10384,6 @@ impl Decoder<ARMv8> for InstDecoder { 0b0100 => { inst.opcode = Opcode::MSR; - let op1 = (word >> 16) & 0b1111; - /* if op1 == 0b001 || op1 == 0b010 || op1 >= 0b100 { return Err(DecodeError::InvalidOperand); diff --git a/tests/armv8/a64.rs b/tests/armv8/a64.rs index cdb1265..577028e 100644 --- a/tests/armv8/a64.rs +++ b/tests/armv8/a64.rs @@ -65,7 +65,7 @@ fn test_display_misc() { ); test_display( [0x1f, 0x20, 0x03, 0xd5], - "esb" + "nop" ); } @@ -663,7 +663,7 @@ fn test_decode_chrome_entrypoint() { ); test_display( [0x1f, 0x20, 0x03, 0xd5], - "esb" + "nop" ); test_display( [0x20, 0x00, 0x1f, 0xd6], @@ -4175,7 +4175,7 @@ fn test_openblas_simd_movs() { #[test] fn test_openblas_misc_ops() { const TESTS: &[([u8; 4], &'static str)] = &[ - ([0x1f, 0x20, 0x03, 0xd5], "esb"), // executes as nop, but also a barrier + ([0x1f, 0x20, 0x03, 0xd5], "nop"), ([0xbf, 0x3a, 0x03, 0xd5], "dmb ishst"), ([0xbf, 0x3b, 0x03, 0xd5], "dmb ish"), ([0xdf, 0x3f, 0x03, 0xd5], "isb"), |